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Litho pact boosts Scalpel

Four chipmakers and two equipment manufacturers have joined forces to speed up the development of the cutting-edge lithography technology called Scalpel. The chipmakers are Lucent Technologies, Motorola, Samsung, and TI. They will work with eLith, a joint venture of Applied Materials and ASM Lithography, to further expand the new technology. An alternative to optical lithography, Scalpel uses projection electron technology to print images with features 0.05 µm. State-of-the-art optical lithography prints 0.18 µm. Lucent's Bell Labs originally developed Scalpel as an alternative technology for processing chips with feature sizes 0.1 µm. Applied Materials and ASML formed eLith to commercialize the electron projection technology.

NIST assists MEMS projects

The creation of a novel MEMS reactor gas monitor and the development of MEMS-based infrared sensors were among the 37 R&D projects to receive 1999 grants from NIST's Advanced Technology Program. ATMI of Danbury, CT, was awarded approximately $1.7 million by the agency to develop in-process gas sensors designed for use in wafer etching. The sensors will facilitate efficient etching and lower emissions in next-generation wafer processing, ATMI says. Total budget for the project is approximately $3.8 million.

Ion Optics of Waltham, MA, is trying to develop a mid-IR gas absorption sensor-on-a-chip. The sensor could be installed in small, inexpensive instruments for detecting specific atmospheric contaminants such as carbon monoxide, the company says. Ion Optics was awarded approximately $753,000 for the project, which has an estimated budget of nearly $1.4 million.

ATP's 1999 competition drew more than 400 proposals covering a range of technologies, says NIST, which manages the program. Twenty-six of the awards went to small businesses. More than 20 universities are involved in the 37 projects. NIST will disburse approximately $110 million through the ATP, while private industry will spend about $102 million. NIST says the program enables U.S. businesses to support technically risky projects that they would otherwise be unlikely to undertake.

The institute recently reported that a previously funded project has helped the semiconductor industry attain a key goal pertaining to 300-mm wafers. Ion implantation technology was developed under the ATP program by Diamond Semiconductor Group in Gloucester, MA, and commercialized by Varian Associates. The implantation technology has been bought by every chipmaker with 300-mm pilot plants, according to Diamond Semiconductor. The method also reduces error-induced scrap by 93% because it handles one wafer at a time instead of using the conventional batch method of handling 13 to 17 wafers, the vendor claims. Information: http:// www.atp.nist.gov.

Agreement to aid CMP process

VLSI Standards has licensed technology from MIT in order to make reference wafers for characterizing the CMP process. The San Jose­based company will manufacture the wafers using MIT Maskworks. The first product will be a reference wafer set called CMP PlanaRef. It will be designed for characterizing and understanding pattern-dependent variations in the dielectric CMP process on device structures with a wide range of area, density, and pitch. Two additional products will follow. The first will be a software support package for determining planarization length, and the second will be a reference wafer for CMP damascene process development. Information: 408/428-1800; http://www.vlsistd.com.

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