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Product Extra!
A system for measuring copper CMP process parameters on-line in the
polisher has been developed by Nova Measuring Instruments. Based
on the company's NovaScan technique, the system measures metal loss,
metal thickness, and residues inside the die on actual structures. The
technology will enable IC manufacturers to shift to high-end copper processing
by aiding the removal of copper and barrier residues from field or patterned
areas and by preventing mechanisms that lead to the loss of metal thickness,
such as erosion and dishing in dual damascene sites. Information: +972
8 9387505.
GaSonics International is offering the PEP Plus 3510, an enhanced
version of the PEP 3510A dual-chamber photoresist removal system. The
enhanced system includes a high-powered microwave generator that improves
photoresist removal rates and digital calibration that extends magnetron
lifetime and lowers the cost of consumables. Improved photoresist
removal rates and a faster robot can increase throughput by 20% over the
earlier model. For customers whose fabs are equipped with standard mechanical
interface (SMIF) capability, a SMIF arm is optionally available. Users
of the PEP 3510A system can choose the PEP Plus 3510 upgrade package as
an option. The new platform will replace the original platform on orders
beginning in June 2000. Information: 408/570-7633.
Soitec's silicon-on-insulator (SDI) Unibond substrate has been qualified
by Honeywell. The Unibond wafers are produced using commercially available
equipment with a process that incorporates both ion implantation and wafer
bonding technologies. The silicon quality of this wafer is higher than
that of standard or low-dose wafers created through the separation by
implanted oxygen (SIMOX) process, and the uniformity of the silicon dioxide
layer is much better than that of SOI wafers produced by the bond and
etch-stop method. The transition to Unibond wafers enables the manufacturing
of very complex integrated circuits that cannot be produced with SIMOX,
such as high-temperature products. Honeywell uses the SOI wafers to produce
ASICs, SRAMs, ROMs, FIFOs, and data bus interfaces. Information: +33 0476
927500.
A process visualization workstation from Electroglas helps characterize
and manage the wafer bumping process. The QuickLook system analyzes
bumped wafer inspection data and images generated by the QuickSilver bump
inspection system on the production floor. The workstation facilitates
the comparisons of bump height, position, area, roundness, and volume
within and among die, wafers, and lots. Capable of pulling data from multiple
QuickSilver inspection systems, it enables an analysis of bump fabrication
data by organizing and presenting wafer maps, defect maps, measurement
files, and images. QuickLook collects all the measurements of defective
bumps and archives bump images with wafer maps, bump measurement data,
and automated defect classifications. Information: 408/727-6500, ext.
6511.
An applications package for compound semiconductor analysis using
a Fourier transform infrared (FTIR) measurement tool has been developed
by On-Line Technologies. Used to analyze complex thin films, the
FilmExpert combines advanced optics, model-based analysis, and a highly
stable FTIR to extract thickness, carrier concentration, index of refraction,
and composition information from multilayered structures. Providing
data from infrared reflectance measurements of product wafers with no
artifacts or biases from stray backside reflections, the tool is configured
for manual wafer loading and high-speed wafer mapping. A suite of model-based
analysis algorithms permits the extraction of multiple parameters from
complex structures. Layers as thin as 100 nm can be measured with a level
of precision better than 5 nm. Information: 860/291-0719.
Tegal has been granted a U.S. patent for a plasma rector with
a deposition shield. The shield prevents the redeposition of wafer
processing materials on the interior surfaces of inductively coupled plasma
reactors, hindering the degradation of the power transfer into the etch
reactor. Over time, this deposition affects reactor performance, resulting
in a loss of etch rate, poor uniformity, and decreased uptime and throughput.
The technology was developed for use in MRAM, FeRAM, data storage, and
next-generation system-on-a-chip applications and is available as an option
on the 6550 series etch reactor. Information: 707/763-5600.
An updated version of the Eliminator Junior ionizer from ESD
Systems is available with removable emitters. The emitter cassette
can be removed easily, enabling cleaning away from the work area or rapid
replacement to minimize downtime. The unit has auto-balancing capability
and a "clean-me" indicator that flashes when the emitters require cleaning.
Available in 120- and 220-V ac models, the unit has airflow output ranging
from 60 to 70 cu ft/min. Information: 508/485-7390.

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© 2007 Tom Cheyney
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