SPECIAL REPORT

IBM announcement may boost fortunes of low-k spin-on method

IBM ended months of a-wink-and-a-nod speculation with the April 3 announcement that it will use Dow Chemical's SiLK spin-on resin as an insulator for its dual-damascene copper processes. IBM and Dow say the chipmaker will integrate several levels of copper using SiLK resin. The decision means that IBM will be the first semiconductor manufacturer to make commercial use of a low-k dielectric material of <3 k in its copper CMOS processes.

The first chips made with the new process will be available next year, IBM says. The eight-level ASIC devices, named Cu-11, will have 0.13-µm feature sizes and five interconnect layers made with SiLK. The chipmaker says the new devices will improve computing speed and performance by 30%.

Given public knowledge that both companies had been working together, the decision was as close to an open secret as you can get in an industry that guards intellectual property the way a pit bull guards its backyard. Whether IBM's decision will boost the fortunes of the spin-on method of applying low-k materials remains to be seen. Proponents of the CVD method continue to insist that the entrenched and widespread process is better suited—at least in the near term—than the spin-on technique for next-generation interconnect processes.

Recent reported comments from the Novellus Systems camp show that the debate rages on. Wilbert van den Hoek, executive vice president of integration and advanced deposition for Novellus, boldly asserted that 80% of the semiconductor industry favors CVD SiO^₂ films in the 0.18- and 0.13-µm process nodes. "His [position] is that, about eight months or so ago, 80% of the world was saying that spin-on was going to be the way to go for k values lower than 3.5, and CVD was going to be about 20% [of the market]. He thinks that situation has flipped completely around," says Bob Climo, director of marketing communications for Novellus. Regarding the IBM announcement, Climo believes the spin-on method may attract additional adherents following Big Blue's decision— but not too many. The announcement "may slip the world back to 70% CVD and 30% spin-on," he explains. The majority of customers in the short term will select the CVD approach, "at least to 2.5 k."

Then again, last year Novellus purchased spin-on technology from Fairchild Technologies in order to investigate alternatives to CVD, Climo points out. "There's no question that in the long term the CVD approach will have to be further developed or modified in some way to be able to get down to below 2 k."

Climo insists, however, that the Fairchild acquisition "is not invalidating our belief in the CVD approach." Novellus wants to ensure that it is positioned for whatever approach the industry decides to adopt "in the future, say 18 months down the line."

The terms of the debate are well drawn. Broadly put, spin-on materials offer lower dielectric constants than their deposition counterparts, while deposited films are more robust. Says Climo: "A lot [of the discussion] has to do with issues of structural integrity, and CVD materials tend to hold up better under packaging [pressures] than low-k spin-on materials."

For interlayer dielectric (ILD) use, spin-on needs to use hard masks because the material is softer than CVD dielectrics, assert deposition proponents. During dual-damascene copper processes CMP is used to polish the interconnect layers. Critics of spin-on question whether the porous materials have the requisite hardness to withstand planarization.

Texas Instruments, which has been working with Applied Materials's Black Diamond material, reported in early April that it will first use Black Diamond in fall 2001 when it begins processing 0.13-µm semiconductors with a CVD tool. Applied says Black Diamond has a dielectric constant of <2.7. It manufactures the film for use in chips with geometries 0.18 µm.

Novellus and Applied are not the only equipment suppliers pushing the CVD interconnect option. Wales-based Trikon Technologies is working with LSI Logic to implement 0.18-µm processes that combine the tool company's Flowfill gap-fill CVD solution for low-k with the chipmaker's existing aluminum interconnect and tungsten plug designs. Andy Noakes, Trikon's CVD products marketing manager, told MICRO at Semicon Europa in April that LSI "is getting 20­25% and higher speed increases, with the same design rules, at the 0.18-µm node for LSI's G-12 chip, with a k value of just over 3." The G-12 will be part of the chipset in Sony's next batch of PlayStation II appliances, according to Noakes.

He adds the two companies have been surprised to discover that "the tighter the [circuit] lines, the better the k." They also say that the low carbon content of the Trikon dielectric film poses few of the potential defectivity problems associated with etch and resist strip, making it "easier to integrate than some competitive films." Trikon's effort to extend its low-k technology into copper interconnect "looks good" in terms of mechanical hardness and film chemistry stability, Noakes says, noting that the supplier will be "building test structures for copper over the next two quarters."

Although it will be the first to commercialize the use of spin-on materials of <3 k, IBM, of course, is not the only entity working with the technology. IMEC in Leuven, Belgium, said in February that it had created aluminum/tungsten interconnects with SiLK resin. The university-based research center has successfully processed wafers integrating two interconnect levels based on aluminum wiring and tungsten vias. Dow says the SiLK resin is the only one with a dielectric constant of 2.65 and a processing stability reaching 490°C.

That same month, Tokyo Electron Ltd. (TEL) and Dow Chemical signed an agreement to use SiLK resin in jointly developing processes and equipment for low-k and ultralow-k materials for the 0.13-µm generation of chips and beyond. Lacking fluorine, the dielectric resin offers high planarization and gap fill. In addition, its dielectric constant of 2.65 is 40% lower than silicon dioxide's, Dow claims.

Companies in the Asia-Pacific region are more open to trying the spin-on materials, according to Mark McClear, the global marketing manager for Dow Chemical's advanced electronic materials. "Japan, and Asia in general, are more comfortable with spin-on processes and hence are more agreeable to using SiLK."

Honeywell Electronic Materials is also partnering with TEL. In mid-February the materials unit announced a $15 million expansion of its Semiconductor Technology and Research (STAR) center, which specializes in interconnect technology R&D. The company is adding several new tools at the site in Sunnyvale, CA, including an Endura PVD system from Applied Materials, a JEOL scanning electron microscope, a 9600 metal etcher from Lam Research, and an unnamed "high-sensitivity copper contamination tool."

McClear says the use of low-k dielectrics turns the usual relationship between the toolmaker and the materials supplier on its head. "The integration of low-k dielectrics is the reverse of the usual model. Here, the materials supplier dictates what tools you use."

Lynn Forester, director of marketing and business development for wafer fabrication materials at Honeywell, says one of the concerns in selecting a spin-on material is the choice of solvents. "You can't choose a solvent system because it's a great system for spinning. You also need to factor in the solubility of the polymer. The two have to be compatible. The solvent system is one of the considerations that can lead to a good film coating or not. Mostly, when we develop materials we're more focused on the actual polymer properties."

Forester adds that materials suppliers such as Honeywell have to consider the temperature stability "and obviously the dielectric constant" as heavy influences on the choice of the polymer. "The solvent system can really have an impact on how the material is spun on and whether it forms a nice film. One of the [concerns] with spin-on polymers versus CVD films is that it's a chemical. You have to keep changing bottles. When you change a bottle; well, it's pretty basic. You have a dipstick that goes into the bottle, and if you take that dipstick out and it dries out, that's bad. It'll cause particles."

What Forester calls "traditional materials" such as Honeywell's HOSP and Dow's FOX chemicals "dry out. They don't resuspend. They are just in the liquid. If one of those hits your wafer you've got a big streak where it came out. One of the issues that customers will have with low-k films is whether you can rework them. It's much like photoresist, if you're a photoresist engineer. If something goes wrong with your track tool and you print the wrong reticle, you can strip it off. With low-k dielectrics [the issue of] how to rework the films, and if you need to, is starting to get more attention. We hope you don't have to."

Forester believes all the materials vendors need to work with track system suppliers. Her division is working on developing advanced in-line filtration for tracks. "Before the liquid goes on the wafer, the last thing it sees would be a filter. They're very advanced technically compared with what was done 10 years ago, when in-line filters were not recommended for spin-on glass. We're now finding much better results with film." She thinks the necessary filters will remove particles down to 0.25 or 0.1 µm.

Forester dismisses some of the lower dielectric constant values claimed by CVD proponents. "The benefit of spin-on is that you can achieve values that you can't achieve with CVD. They claim they can get down to 3 point something—and have done it—and that they'll get down to a stable 2.8 k. I'll give them 2.8 on a good day. In the long term, I think spin-on offers more flexibility than CVD in terms of mixing and matching the types of dielectric constants needed at each [interconnect] level."

Ron Goldblatt, a senior manager at IBM's semiconductor R&D center in East Fishkill, NY, says the research staff used "essentially the same methodology" with spin-on as they do with photoresist applications in determining yield concerns. "Much of that is not a problem. When you start out, early in the program, sufficient yield is the first order of business."

IBM first determined whether it was dealing with any new types of defects, explains Goldblatt. "We pretty much know how to deal with that day in and day out." Of the two types of defects—cosmetic and yield—the "yield killer" is "the first one we look for under every rock . . . Ultimately, when you install manufacturing and do a high-volume ramp, it's at that point you go after every defect possible."

IBM's decision to make the early transition to copper was "a very simple choice to make." Within the overall strategy, IBM "had two things to change: one is the metal; the other, the insulator." The chipmaker narrowed down the list for the latter from 150 potential candidates for oxide replacements to "a half-dozen or so. Then we chose two and did a full-court press . . . to actual builds." Of the six or so replacements surviving the screening process, "we took two forward. Our experience has been that even with things that pass the criteria, until you start to build with them you don't find all the bugs."

Calling oxide a "workhorse" material, the IBM manager notes that "low-k came with a price and that is, basically, which set of issues do you want to address? It's an extendable material beyond the current generation of semiconductors." The use of low-k means introducing porosity "not available with CVD material. We decided to take the plunge now to satisfy the best performance of this generation of chips."

Low-k and ultralow-k materials present a set of challenges, Goldblatt admits. "[Their] inherent resistance to deformation under load is not like oxide." Users have to "make an accommodation with wire bond pads. It does require some inventive things. Luckily, I can tell you we've succeeded at that, or we would not be going forward." By the first half of 2001, IBM expects to transfer the new process to its fab in Burlington, VT, for high-volume manufacturing, he says.

Ken Monnig, associate director of International Sematech's interconnect division, says the knowledge base on low-k dielectrics "is fairly small and not very old, so there are a lot of issues we know about. But there are probably more issues that we don't know about. In general, low-k materials are mechanically different from silicon dioxide. In reality I don't think the average process engineer knows the thermal mechanical properties." Given the "fairly concentrated effort" the industry is making to develop the materials, Monnig wryly notes he doesn't believe "it's going to be 35 years before we get a workable material."

The defect-related concerns are "the standard sorts of issues." These include film adhesion and cracking problems, particularly in dual-damascene processes. "Film thickness uniformity at the macro scale is not really a big issue. We have fairly robust control charts on both wafer-to-wafer uniformity and across-wafer uniformity on a number of materials, not just the Dow material." Monnig says the consortium's members "have found that we can etch presentable structures using fairly close to standard etch tools. In other words, you don't have to invent a new etch or new etch technology. A big challenge is postetch clean or resist strip because you're essentially trying to remove polymer from polymer."

He notes that with their "significant carbon content," inorganic films "can still be a challenge if there are interactions between the photoresist and some of these low-k films." Both the spin-on and CVD techniques—and he says this may surprise some people—can cause these interactions. "They are less a function of how the film is put down and more a function of what the film really is.

"In the case of any spin-on film, you can synthesize that material by different pathways and get what a chemist would tell you is exactly the same material but it's exactly different in both its inherent properties and in how it's impacted by other process steps." Because it's mechanically softer than silicon dioxide, the new insulator can cause concerns about metal extrusion failure. However, Monnig says that not enough is known about the failure mechanisms of copper "to make even a half-definitive statement whether the softer low-k material is going to do worse or better in that respect. The real answer to that question is: There isn't a real big database."

Additional concerns, he explains, come in the "manufacturing line below what I would say is the gross failure level, things like delaminating or peeling, or outgassing. I think there is one company at least that has announced a product where they have, at least within their walls, some fairly high level of confidence that they've worked through these issues."

Ed Shafer, a fracture expert and technical leader at Dow Chemical's materials science group, agrees about the importance of mechanical integrity. "When I look at the future I would say that mechanical integrity is a very large concern for all these new ultralow-dielectric-constant materials. I don't think it's a showstopper for our material. It is something the industry is going to have to be sensitive to, using the existing integration methods."

"I think that there will be some more commitments to low-k this year," Monnig asserts. "Dow has made a statement I essentially agree with. It's that people are going to commit themselves to one or two materials or nothing is going to happen for the 0.13-µm generation. Once this work started, the path of hope was that we would find a material just like glass, except it would have a dielectric constant of 1."