Process Equipment Control

Using exclusion ring technology to avoid CVD tungsten bevel contamination

Patrice Geraghty and Jack McInerney, Novellus Systems

A minimum-overlap exclusion ring technique maintains high film uniformity and prevents the deposition of tungsten on the wafer edge, which can cause contamination.

The tungsten chemical vapor deposition (WCVD) process has been used in manufacturing semiconductor devices for many years. Because of its excellent step coverage, tungsten is used to fill high-aspect-ratio contacts and vias in logic and memory devices. Its use as an interconnect material in memory devices is driven by its superior electromigration properties. The inherent low resistivity of tungsten has fostered the emergence of new applications using this material, including advanced memory devices in which both bit and word lines will be made of tungsten.

In the CVD process, tungsten is applied to the wafer as a planar film and then selectively removed from the surface so that tungsten plugs remain. In the plasma etchback method that has commonly been used for removing tungsten from the wafer surface, a plasma-activated species strips the tungsten from the field areas of the device. This approach requires that the tungsten in the field areas be completely removed while the tungsten plugs remain intact. Although such methods as low-temperature etching have been developed to improve the etchback process, controlling this manufacturing process remains difficult.

Chemical-mechanical polishing (CMP) represents an alternative approach to plasma etchback for removing tungsten from the wafer surface. Although major semiconductor device manufacturers first developed CMP to planarize the high-aspect-ratio trenches used for device isolation, the technique soon began to be used to remove dielectrics and metals in IC manufacturing.¹ Because of its ability to planarize complex structures on a wafer, CMP has revolutionized the industry. Unlike the plasma etchback approach for removing tungsten from the wafer surface, the CMP process makes it possible to uniformly control the area undergoing tungsten removal while minimizing plug erosion and ensuring device reliability. CMP has thus become the preferred method for removing this metal.

The adhesion of CVD tungsten depends on the materials on the underlying wafer surface. For example, tungsten does not physically adhere to dielectrics such as oxide and nitride. As a result, tungsten deposition requires an adhesion layer to promote a continuous and uniform nucleation of the film. Titanium nitride (TiN) is the most common adhesion layer for blanket tungsten deposition, although titanium tungsten is still in use. TiN may be deposited either by physical vapor deposition (PVD) methods or, for more advanced devices, by CVD.

The CVD equipment used to deposit tungsten film has traditionally deposited the metal out to the very edge of the wafer, including the wafer bevel. The deposition of tungsten on the bevel, however, is very risky in semiconductor manufacturing because this can compromise film properties and integrity, even when adhesion layers composed of such materials as TiN are deposited. TiN film on the bevel is often noncontinuous or poor in quality if it is present at all. As a result, tungsten deposited on the bevel may achieve only a marginal degree of adhesion. When subjected to the mechanical stress of CMP, the tungsten/TiN stack on the wafer bevel has a tendency to delaminate, contaminating processing equipment and reducing device yields.

With the widespread adoption of CMP processing in the IC industry, new hardware and process technologies must be developed to prevent both the deposition of tungsten on the wafer bevel and the resulting contamination that can occur in subsequent processing steps. Figure 1 compares the etchback and CMP approaches to tungsten removal. This article discusses the minimum-overlap exclusion ring (MOER) approach to preventing tungsten-related contamination on the wafer bevel.

Figure 1: Deposition requirements of etchback and CMP processes differ, with CMP requiring bevel- and edge-free deposition.

The MOER Technique

The MOER exclusion ring technique pictured in Figure 2 was developed by Novellus Systems (San Jose) and used in the company's Altus and Dual Altus WCVD systems. The ring method permits the deposition of tungsten as close as 3 mm from the wafer edge, minimizing the exclusion zone while maintaining a tungsten-free wafer bevel surface.

Figure 2: Ring exclusion hardware used on the CVD system for CMP-compatible tungsten deposition.

The primary hardware component of the ring system is an aluminum oxide ring. This ring, the exact dimensions of which depend on the process temperature used, overlaps the wafer edge by approximately 2.5 mm. For example, when processing at a temperature of 430°C, the ring typically overlaps the wafer by 2.25 mm, whereas at a temperature of 400°C, a greater overlap is required. At lower temperatures, a surface-controlled reaction occurs, enabling enhanced step coverage and greater encroachment of the reactive gases under the ring surface. In order to maintain a tungsten-free edge and bevel at low processing temperatures, a 2.5-mm ring overlap is required.

Positioned approximately 0.05 mm above the wafer surface, the aluminum oxide ring has a tapered leading edge to minimize interference with showerhead gas-flow patterns, as illustrated in the schematic diagrams in Figure 3. The flow of supplemental argon and hydrogen into the chamber for uniformity enhancement takes place through holes in the ring and has been optimized so that the uniformity of the tungsten film deposited with the ring hardware is on the order of 2%, or 1 standard deviation. This uniformity level is similar to that achieved by traditional full-coverage tungsten deposition (including the edge and bevel).

Figure 3: Schematics of the ring exclusion system showing holes used for gas flow.

The ring device eliminates edge and bevel deposition by preventing the reacting gases from reaching the wafer edge. The very small gap between the wafer and the ring allows only a minute amount of WF^₆ to diffuse toward the wafer. This gas is emitted onto the ring and wafer surface over a few tenths of a millimeter, resulting in a sharp termination of the film at approximately 1 mm from the wafer edge. While other exclusion rings perform this function, simply preventing edge deposition is not sufficient. For a wafer to be production worthy, full film thickness must be maintained as close to the edge of the ring as possible, requiring that the ring not block the flow of gases and inhibit reactants from reaching the near-edge region of the wafer. To do this, the MOER device has a secondary gas-flow mechanism that permits reactant concentrations near the wafer edge.

Without an exclusion ring, flow over the wafer surface should be uniform, except for edge effects.² To understand the disturbance caused by the exclusion ring, models were constructed using a software package from Fluent (Lebanon, NH). This computational fluid dynamics (CFD) program solves partial differential equations for gas momentum, pressure, enthalpy, and species by utilizing the finite-volume method. With this tool, it was possible to explore the effects of introducing a second gas source near the wafer edge. If the gas is introduced at a fairly high speed away from the wafer (radially outward), the momentum of the gas entrains the showerhead gases and draws them to the wafer edge. This venturi effect compensates for the disruption caused by the ring. Moreover, by adding hydrogen (as H_²) to the gas stream, the deposition rate at the wafer edge can be further enhanced by taking advantage of the high diffusivity of H_². Using this model, experiments were performed on the geometry of the ring's gas inlet, providing a fast way to optimize the hardware without having to test many prototypes.

Figure 4 is a CFD diagram of one of the models. The gas leaving the ring (shown in blue) entrains the WF^₆ from the showerhead and draws it to the wafer edge, boosting the deposition rate in this area and enabling the deposition of film with the required thickness. This technique also contributes to the uniformity of other critical film properties that are dependent on WF^₆ flow, such as step coverage.

Figure 4: Computational fluid dynamics model illustrating the uniformity of WF6 flow.

Process Results

Figure 5 is a profilometer plot of nominal film thickness versus distance from the wafer's edge showing the edge profile resulting from the use of the exclusion ring. To obtain these data, 2.25-mm rings were used in the deposition of 4500 Å of tungsten at 430°C. The data were gathered after 14,500 wafers had been processed. Tungsten is completely absent at the wafer bevel and at approximately 1 mm from the wafer's edge. This tight control of the film profile allows device designers to place die to within 3 mm of the wafer edge, maximizing the useful wafer surface area and, therefore, yields.

Figure 5: Profilometer plot showing that the exclusion ring method provides a nominal tungsten film thickness of >90% at 3 mm from the wafer edge.

The exclusion ring's repeatability is shown in Figure 6. The edge profile was monitored approximately every 2000 wafer depositions during a production cycle. Under manufacturing conditions, the ring technique was shown to maintain tight control after many deposition and clean cycles, thus demonstrating the technique's repeatability.

Figure 6: Data illustrating the ability of the exclusion ring system to maintain the desired tungsten edge profile during wafer production.

Production data on the ring technique have been collected for over 680,000 wafers. Figure 7 shows data collected from two deposition systems running at 400°C in the production fab of a major semiconductor manufacturer. Although in situ plasma cleans were performed every 200 wafers per chamber and wet cleans every 10,000 wafers per chamber, no effect on sheet resistance repeatability was observed. This demonstrates the repeatability of the technology on a chamber-to-chamber and system-to-system basis.

Figure 7: Data demonstrating the system-to-system and chamber-to-chamber repeatability of the exclusion ring system.

When integrated into a CMP manufacturing process, the use of the exclusion ring technology under production conditions has led to single-digit particle performance. Particle data obtained from a customer-generated 1000-wafer marathon are presented in Figure 8. For this marathon, a large Asian foundry ran a 430°C WCVD process on an Altus deposition tool. An in situ plasma clean was performed every 100 wafers and particle counts were taken to determine the tool's particle performance. Dry particle counts at sizes 0.20 µm also were obtained immediately before and after the marathon. The data illustrate the exclusion ring technique's ability to maintain a clean wafer environment over many deposition cycles.

Figure 8: Single-digit particle performance obtained during a 1000-wafer tungsten marathon using the exclusion ring system.

300-mm Applications

The exclusion ring technology was initially developed for 200-mm wafers. However, it has been successfully implemented for processing all wafer sizes in volume production. Computer modeling indicates that a simple scaling of the hardware to 300 mm would result in excellent uniformity as well as in edge- and bevel-free deposition comparable to that on 200-mm wafers. The process recipes developed for 300 mm are a direct scale-up from 200-mm process recipes, with frontside gases scaled by area (r²) and backside gases scaled by diameter (2r). The ease of transferring process recipes from 200 to 300 mm means that there is little risk in using the exclusion ring for the production of 300-mm wafers.

Figure 9 shows a sheet resistance map of a tungsten film deposited by a 300-mm CVD system. The sheet resistance nonuniformity of the tungsten film measured at a test diameter of 294 mm is <2%, 1 standard deviation, validating the chamber modeling and design work that went into building the 300-mm reactor.

Figure 9: Sheet resistance map showing the uniformity of a CVD tungsten film measured at 294 mm.

Rather than simply scaling the hardware for 300 mm, the exclusion ring's functionality was expanded so that in addition to preventing edge deposition and maintaining uniformity, the ring also acts as a wafer carrier, transporting the wafer to each of the four deposition stations. Thus, wafer handling has been greatly simplified and non-value-added time has been reduced, resulting in an increase in system throughput of approximately 20% without degradation in film performance.

With the exclusion ring acting as a wafer carrier, the alignment of the ring and the wafer occurs only once in the process cycle—when the wafer is placed in the first deposition chamber. This contrasts with 200-mm processing, in which alignment occurs five times—that is, each time a wafer is moved to a deposition station. As illustrated in Figure 10, the film concentricity—a measure of film centering relative to the wafer center—is <0.1 mm when the ring is aligned only once with the wafer. This is an improvement over 200-mm processing, in which film concentricity of <0.5 mm is typical. Tighter control of concentricity allows for smaller ring overlap, which results in optimal film uniformity.

Figure 10: In 300-mm processing, the exclusion ring and wafer move together from one deposition station to another, resulting in excellent film concentricity.

Conclusion

With the adoption of CMP in high-volume production fabs, it is essential that CVD tools deposit tungsten films that are compatible with CMP processing. One solution to CMP-compatible tungsten films, the exclusion ring technology maintains a wafer surface with a tungsten-free edge and bevel, enabling the integration of tungsten deposition and CMP with no compromise in film properties. By depositing a film with a uniform thickness to within 3 mm of the wafer edge, this technology allows device designers to maximize the usable wafer area for die placement and increase yields. With the successful transition to 300-mm wafer production, the exclusion ring technology will continue to be useful for CMP-compatible tungsten film deposition.

References

1. T Tucker, "The Evolution of CMP Technology in Device Manufacturing: Applications and Challenges," Semiconductor Fabtech 2 (1995): 265­272.
2. H Schlichting, Boundary-Layer Theory (New York: McGraw-Hill, 1979), 95­98. 

Patrice Geraghty, PhD, joined Novellus Systems (San Jose) in 1998 and is director of strategic marketing for metals. For more than 10 years she has worked in the areas of CVD tungsten, tungsten silicide, and CVD barriers, including at Genus, where she held a variety of positions in engineering management and marketing. Geraghty is the author of 16 technical papers and is one of the founding members of the Bay Area Thin Film Users Group (TFUG). She received a PhD in chemistry from the University of Michigan (Ann Arbor) and a BA in chemistry from New York University in New York City. (Geraghty can be reached at 408/953-4100 or patrice.geraghty@novellus.com.)

Jack McInerney is a senior staff engineer in the reactor modeling group at Novellus Systems, where he has worked since 1990. For the past 11 years he has used computational fluid dynamics tools both for semiconductor equipment development and recreational pursuits (such as the physics of cooking meat). Before joining Novellus, he worked at Genus on the process development of tungsten, tungsten silicide, and dielectric films. Before that, he worked at Intel on the development of analytical techniques for low-level radiation detection and thin-film stress measurement. McInerney is the author of 25 papers and holds seven U.S. patents. He received a BS in physics from California Polytechnic State University, San Luis Obispo, in 1979. (McInerney can be reached at 408/922-4830 or jack.mcinerney@novellus.com.)

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