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INTERNATIONAL
SEMATECH WATCH

IMEC enters gate project

Researchers at IMEC and International Sematech will conduct joint R&D work to develop a new gate-stack process for sub-100-nm semiconductors. Under the terms of a joint agreement, the Belgium-based research consortium and its Texas counterpart will collaborate over a 3 1/2-year period on developing effective tools, materials, and processes for devices with 0.10-µm linewidths and smaller. The partners will concentrate 50% of their efforts on research into advanced gate-stack material deposition, 30% on electrical and reliability characterization, and 20% on replacement transistor gate development for materials characterization, EHS, and contamination control.

The two organizations established the multimillion-dollar project in order to speed up efforts to find a replacement for current gate-stack materials by as much as two years. The partners note that the International Technology Roadmap for Semiconductors (ITRS) calls for thinner effective gate dielectrics for sub-70-nm ICs. The project involves placing Sematech assignees outside the United States for the first time. More than 30 scientists and researchers will conduct the work at IMEC's headquarters in Leuven, Belgium. The U.S. consortium will appoint a project manager to oversee the work at IMEC, and member firms will be asked to choose assignees to work in residence at the center.

Research activities will focus on areas such as processes for depositing high-k dielectric materials, including interface preparation and deposition using atomic-layer CVD; physical and chemical characterization of deposited dielectrics; reliability of gate-stack structures; dry etch processes; and contamination control. Information: http://www.imec.be; http://www.sematech.org.

Workshop agrees on pellicles

An international cross section of experts attending an International Sematech workshop on pellicle risk assessment believes the industry should concentrate on developing soft pellicles for the 157-nm wavelength. The experts meeting in Vancouver, British Columbia, in early August also agreed, however, that backup research is needed into hard, or modified fused silica, pellicles. The soft-membrane counterparts are made of polymer.

Gerhard Gross, director of lithography at International Sematech, acknowledged there are risks involved in choosing a pellicle direction for 157-nm lithography "this early in the game." He notes in particular that no specific direction suits all the needs for that technology node. In order to develop equipment in time to meet ITRS goals, lithography tool manufacturers must have enough lead time, Gross pointed out. The roadmap schedule calls for the industry to introduce 157-nm exposure tools by 2003.

Selete, the Japanese equipment manufacturers' consortium, participated in the workshop. The decision to take part will enable the industry to reach a consistent solution, streamline development, and keep costs down, asserted Nobuhiro Endo, Selete's director of lithography.

Approximately 45 experts from 20 companies participated in the workshop. The companies represented included IC manufacturers, reticle manufacturers, pellicle mask makers, equipment suppliers, and related organizations, Sematech says. The consortium has scheduled another meeting for September for workshop participants to discuss the progress of their decision. Information: http://www.sematech.org.

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