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INDUSTRY NEWS

300-mm Imperative

Alliance targets advanced R&D

Three major semiconductor manufacturers have launched an alliance to speed development of 300-mm CMOS technology at the 90-nm technology node and below. Motorola has joined STMicroelectronics and Philips in a 300-mm wafer project called Crolles2, named after the city in France where the program is based. A fourth partner, the Taiwan-based foundry TSMC, also will participate. CEA/LETI, the French research laboratory in Grenoble, will contribute as well.

Motorola, STM, and Philips will share equally in the alliance's expenses, research costs, and wafer output at the fab in Crolles. By 2005 the total investment in the venture will reach $1.4 billion. Alliance members believe TSMC's participation will strengthen the development of CMOS process technology. Motorola brings expertise in SOI and embedded MRAM processes to the partnership. The new agreement expands a pact signed in March by Philips, STM, and TSMC to codevelop advanced CMOS processes.

Sematech pushes standards tool

International Sematech wants to save the semiconductor industry from unnecessary testing of 300-mm production gear. The Texas semiconductor research consortium has launched a program to define a single set of requirements for certifying 300-mm equipment. The goal of the program is to develop criteria that will enable objective, independent tests. By the end of the year organizers hope to establish broad guidelines that can be used in any standards domain, as well as criteria for 300-mm software standards testing.

"By setting up industry guidelines and processes and certifying the companies that apply those criteria in testing equipment, we can save our member companies the time and expense of testing the same tools that their neighbor down the street just tested," says Scott Kramer, director of manufacturing methods and productivity at Sematech.

Draft guidelines are scheduled for publication in July 2002. They will focus on processes and criteria for the administering agencies and test-service vendors. The guidelines will also contain a standardized method for creating tests and test criteria based on standards and customer requirements, Sematech says. The consortium will publish the final guidelines on its Web site in December.

After the guidelines are finished, Sematech says it will find an organization to administer the certification process. The consortium is seeking input from equipment suppliers, test-service vendors, chipmakers, and interested agencies. Information: www.sematech.org.


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