water consumption in semiconductor fabs
Klusewitz and Jim McVeigh, Fairchild Semiconductor
A series of studies has led
to sink, water line, and other technology modifications, enabling a semiconductor
fab to significantly reduce water and electricity consumption.
manufacturers use immense amounts of water. A large portion of that water
is used to produce DI or ultrapure water. In the manufacturing process,
water is employed to rinse and clean semiconductor wafers. Approximately
1500 gallons of city water are required to produce 1000 gallons of DI
water. More than 2000 gallons of DI water can be used in the production
of one 200-mm wafer, and large facilities can use 3 million gallons of
DI water per day, according to "Energy and Water Efficiency for Semiconductor
Manufacturers" (Pacific Northwest Pollution Prevention Resource Center,
2000). It costs approximately $12 to generate 1000 gallons of DI water.
from the cost of the water itself, producing DI water involves ultraviolet
lamps, filters, pumps, and recirculating systems, which require energy
to operate. It is also costly to remove effluents via a water-treatment
plant. Reducing DI-water consumption by 1000 gallons lowers power use
by about 46 kWh. By reducing DI-water use by 10%, a facility using 3 million
gallons of DI water daily can save 5 million kWh annually, or about $225,000
at an energy price of 4.5 cents per kWh.
article describes the methodology and results of a study to reduce DI-water
consumption conducted by a cross-functional team at Fairchild Semiconductor's
150-mm wafer fab in Mountaintop, PA. The team was composed of process
technicians, process engineers, facility engineers, and equipment vendors.
Reduction efforts initiated in February 2001 included rinse sink, process,
and supply modifications. The goal of the study was to reduce DI-water
consumption by 2 million gallons within one year. The annual savings from
this effort was projected to approach 18 million gallons of DI water,
or about $223,000.
Semiconductor, a large U.S. supplier of signal processing and power control
devices to the automotive, telecommunications, industrial, and computer
marketplace markets, purchased the Mountaintop wafer fabrication facility
from Intersil in March 2001. The facility includes a 4-year-old 200-mm
fab and an 11-year-old 150-mm fab with different toolsets and physical
fabs operate on a four-shift, 12-hour compressed workweek. All production
personnel are structured into self-managed work teams that are organized
according to functional area. Each team consists of equipment repairers
and production associates represented by Local 177 of the International
Union of Electronic, Electrical, Salaried, Machine, and Furniture Workers,
organized in the AFL-CIO. Equipment technicians are responsible for maintaining
and improving the equipment used in the manufacturing process. Based on
their manufacturing experience, technicians also make decisions about
fab processes and product disposition. Although supervisors are not assigned
to monitor daily fab activities, all production personnel report to the
fab manufacturing leader. Engineering and facilities personnel are assigned
to support groups.
efforts of the cross-functional team formed to reduce DI-water use were
concentrated in Fab 6 (the 150-mm fab) after it was determined that that
facility clearly consumed more water than the 200-mm facility. Initial
comparisons attempted to determine water consumption per square inch of
silicon. However, because of the market downturn and reduced wafer output,
that index proved to be ineffective. Consequently, the team investigated
other methods to decrease DI-water use while maintaining product quality
as well as environmental and safety practices.
Efforts to Reduce DI-Water Consumption
initial meetings of the cross-functional team focused on identifying DI-water
use and on establishing reliable testing methods to assure that product
quality would not be compromised by DI-water reductions. The team first
concentrated on the Fab 6 wet etch sinks, which use traditional-style
acid, spray/dump/rinse, and spin rinse/dry applications.
team identified several immediate ways to decrease DI water consumption:
1 L/min constant-flow sample line of DI water, used for obtaining bacteria
samples, was shut off after an alternate method of obtaining samples
was developed. Annual savings were projected to be $2000.
leaking water lines to the sinks and difficult-to-find manifolds inside
the sinks were repaired. In addition, the water line to an internal
sink that leaked into the plenum, and eventually the drain, was repaired.
production associates had been running DI-water dump rinsers without
wafers in them to time wafer etch cycles, instead of using the established
timers on the sinks. After being reviewed by the DI-water reduction
team, that practice was eliminated. Assuming that 15 dumps were performed
per 12-hour shift in a 4.5-gallon dump rinser, it was calculated that
annual DI-water savings would amount to $600.
team discussed best-practice plans for sinks during shutdown periods,
which had been implemented because of economic conditions.
team identified another opportunity to reduce DI-water consumption with
minimal or no impact on wafer quality. Dump rinsers, which are used to
rinse the product after an etch operation, are configured to perform idle
flow, a continuous DI-water overflow of the dump rinser that is used to
prevent particles and bacteria growth. Team members suggested that reducing
idle flow to more conservative levels, based on experience and similar
successful efforts in the Fab 8 facility, would be sufficient to prevent
appropriate evaluations, idle flow was reduced by adding orifice restrictors
in. in diameter to the appropriate flow line. To accomplish the job, a
series of actions were performed. First, orifice restrictors were added
to two Z-strip (chemical resist removal) DI-water holding tanks, which
are used when work flow through the Z-strip is interrupted for one reason
or another. With the restrictors in place, water flow was reduced from
1.5 gal/min to 0.4 gal/min on Z-strip 1 and from 8 gal/min to 0.5 gal/min
on Z-strip 2. The total DI-water reduction was 8.6 gal/min, amounting
to a projected annual savings of $54,100.
all of the dump rinsers in Fab 6 were readjusted. Orifice restrictors
were installed upstream of the idle-flow valve on the bottom fill of the
dump rinsers (see Figure 1), and flow to the top sprinkler heads was reduced
to a trickle to maintain reduced-flow conditions. Water fill-rate measurements
were taken before and after the readjustment to determine the amount of
water reduced. Idle flow on three Z-strip sinks, two metal-etch sinks,
and two buffered-oxide-etch sinks was reduced from 31.6 gal/min to 8.6
gal/min, amounting to a total projected yearly savings of $145,000 in
DI-water production costs.
Figure 1: Side view
of the dump rinser after modification.
step involved correlating and replacing the resistivity probes on the
spin dryers where needed. After an etch process, wafers are rinsed in
a dump rinser and then rinsed again and dried in a spin rinser/dryer.
Initially, the wafers receive a 2-minute DI-water rinse in the spin dryer,
followed by a Q-rinse if necessary to reach the required resistivity level
of 16 MW-cm. They are rinsed again with DI water until that resistivity
value is exceeded, and then the DI drain water is measured for resistivity.
Rinsing removes ionic contamination, and the resistivity measurement of
DI drain water indicates when ionic contamination has been reduced to
acceptable levels. However, correlation of the resistivity probes indicated
that several probes were in need of replacement, indicating that the Q-rinse
step was not functioning efficiently. After the faulty probes were replaced,
DI-water consumption was lowered.
meeting with the area production teams, the DI-water reduction team proposed
eliminating one Z-strip sink. In order to prevent bacteria growth, the
dump rinsers on the sink were constantly running on idle flow. By eliminating
the sink, idle flow was reduced, amounting to a DI- water savings of 1.2
gal/min. After reviewing fab capacity models, manufacturing determined
that the extra sink could be eliminated without affecting the work flow.
The annual savings was estimated to be $7550.
Wafer Quality while Lowering Water Consumption
focusing their attention on several sinks in the etch area, the team proposed
that the number of dumps in the sink dump rinsers be minimized. The dump
rinsers rinse wafers after a wet etch process. Wafers vertically positioned
in boats are placed in the dump rinsers and the dump rinser controller
is activated. Water in the dump rinser is drained out the bottom while
fresh DI water is introduced from sprayers at the bottom and top of the
tool. When water completely fills the dump rinser and covers the wafers,
it is dumped again.
Z-Strip Dump Cycle. Concerned that a reduction in the number of dumps
could lead to incomplete rinsing, the team proposed that the Z-strip and
megasonic clean process dump cycles be investigated. Tests comparing the
effects of running five versus three dump cycles in Z-strip were performed,
and bare wafers were tested for particle counts. Wafers were first processed
in a buffered-oxide-etch tool for 60 seconds to deposit more than 600
particles on each wafer. Five wafers were placed in a boat (two at both
ends and three randomly in the middle) and processed through Z-strip with
the standard five dumps, while another group of five wafers was processed
with three dumps. The number of >0.3-µm particles remaining was
determined, and cleaning efficiency in percent was calculated according
to the formula:
process: 23 particles, 96.9%.
process: 17 particles, 97.8%.
the same wafers were coated with resist, baked, and processed again, particle-count
process: 13 particles.
process: 23 particles.
counts were also determined for three product lots that had been split
at Z-strip prior to gate clean. The results were:
process (odd-numbered wafers): 33 particles.
process (even-numbered wafers): 21 particles.
yields for the odd and even wafers were statistically the same.
of spin-dryer resistivity performed on the resist-removal part of the
Z-strip process only showed that the standard five-dump cycle and an exaggerated
one-dump cycle required similar processing times to reach the required
16-MW-cm resistivity level. Wafers received an 8-minute hot DI-water
rinse after sulfuric acid resist removal, which was sufficient to completely
rinse the wafers. Samples of the dump rinser DI water were also taken
from both a standard five-dump cycle and a worst-case one-dump cycle and
then measured with ion chromatography equipment from Dionex (Sunnyvale,
CA). Wafer anion levels in both cases were comparable (<1 ppm).
on a production schedule of 5000 wafers/wk (330 lots), the three-dump
cycle requires four fewer dumps for every two lots processed through Z-strip
than the standard five-dump cycle. Accordingly, based on a manufacturing
schedule of six Z-strips, the number of dumps/wk is reduced by 3960 dumps.
With a dump totaling 4.5 gallons, that results in a DI-water savings of
17,820 gal/wk, or 1.8 gal/min. The projected savings is $11,300 per year.
the Number of Dumps for Aluminum Etch Processing. An evaluation
was also performed to determine the feasibility of reducing the number
of dumps from eight to five for the wet aluminum etch process. Dump rinser
water samples were procured and analyzed, spin-dryer resistivity tests
were conducted, and split lots were run. All results were positive, indicating
that decreasing the number of dumps would not affect wafer quality. Based
on a production schedule of 5000 wafers/wk (330 lots), three fewer dumps
per lot, or 990 fewer dumps/wk, can be processed through wet aluminum
etch by reducing the number of dumps from eight to five. With a dump totaling
4.5 gallons, the overall DI-water savings is 4445 gal/wk, or 0.44 gal/min,
translating into a savings of $2800 per year.
the DI-water studies were being conducted, the facilities members of the
team concentrated on reducing non-DI-water use throughout the plant. They
took several key measures:
outsourced the production of compressed air. Since the internal air
compressors were water-cooled, shifting to an external supplier resulted
in reducing yearly water consumption by 13 million gallons.
shifted to the use of recovered water to run the water-cooled packaged
air conditioners. Furthermore, the air-conditioner systems were put
on time-of-day control and on-demand control, leading to an overall
reduction in water consumption of 1.5 million gal/yr.
placed several house fume scrubbers on reverse-osmosis reject water,
further reducing water consumption by 3.6 million gal/yr. Plans were
also drafted to convert additional fume scrubbers in the future.
began to use recovered water as a supply source for the production of
article describes a series of measures undertaken to lower water consumption
on the fab floor. The total projected savings from the project of $223,550,
based on reducing consumption in areas with measurable water flows, are
broken down in Table I. Other measures, such as repairs to internal sink
leaks, are not accounted for. Figures 2 and 3 illustrate the changes in
Fab 6 water and electricity use in 2001. Since the measures were implemented,
wafer quality has not been adversely affected.
Yearly Savings ($)
off unused DI-water
process timers instead
of dump rinser cycles
flow restrictors to Z-strip
idle flow on sinks
dump rinses from
five to three for Z-strip
dumps from eight to
five for aluminum etch
one Z-strip sink
Table I: Fab 6 DI-water
2: Fab 6 water savings in 2001 over 2000.
3: Fab 6 electricity savings in 2001 over 2000.
efforts will include the installation of additional orifice restrictors
in Fab 6 to reduce idle flow. Moreover, two new sinks, with production
capacity equal to or better than that of the four existing sinks, will
be constructed in the etch department.
article is based on a paper presented at the 13th annual IEEE/SEMI Advanced
Semiconductor Manufacturing Conference in Boston, April 30–May 2,
Klusewitz is the Fab 6 process engineering manager at Fairchild Semiconductor
(Mountaintop, PA). His areas of responsibility include epitaxial growth,
all fabrication processes, and parametric test probe. He received a BS
in electrical engineering from Pennsylvania State University in University
Park. (Klusewitz can be reached at 570/474-3296 or email@example.com.)
McVeigh is the Fab 6 etch engineer at Fairchild Semiconductor. He
is responsible for wet and dry etching of thin films (oxide, poly, metal,
and borophosphosilicate), and for wet/dry resist removal. He received
a BS in chemical engineering from the University of Pennsylvania in Philadelphia
and an MS in chemical engineering from Drexel University in Philadelphia.
(McVeigh can be reached at 570/474-6761, ext. 4836, or firstname.lastname@example.org.)
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