Production pressures, limited resource availability, the lack of detailed process equipment knowledge, and the costs associated with equipment downtime often lead semiconductor fabs to adopt a symptom-treatment approach to handling process equipment–related particle problems. Sudden particle excursions during production are frequently alleviated by simply repeating a particle check or by performing a chamber purge or cleaning step. The drawback to this approach is that another particle event with the same root cause is probable. This risk can be minimized by the establishment of partnerships between chip manufacturers and their equipment vendors. Supplier service programs at customer manufacturing sites can range from collaborations with the fab's factory service organization to full ownership of equipment.

After an equipment-related particle event at a fab is identified and confirmed, a process-monitoring phase is initiated to fingerprint the suspect process tool. Following the collection of wafer monitor results, those data that reveal typical defect types, trends, or signatures are extracted and correlated. (In most of the cases discussed here, this analysis phase relied heavily on the capability of a scanning electron microscopy [SEM] system to extract information on defect size, morphology, and composition.¹) The next step involves particle characterization and root-cause analysis performed by process and equipment engineers from the tool supplier, who utilize their company's so-called defect knowledge library to search for descriptions of similar excursions.² That library is a database containing descriptions of process tool–related defect problems that have been documented, and resolved, in the past. In the final phase, corrective action is followed by a second process-monitoring phase to confirm that the appropriate solution has been implemented.

This article focuses on the successful implementation of a partnership between two Philips Semiconductors fabs and Applied Materials Europe (Nijmegen, The Netherlands). The methodical approach to identifying and resolving the root causes of particle events in collaboration with the toolmaker is described, and examples of applying the methodology in three process domains—oxide etch, ion implant, and metal PVD—are provided.

Enhancing Oxide Etch Chamber Productivity

One productivity enhancement program at Philips Semiconductors' Böblingen, Germany, facility focused on a series of identical MxP+ oxide etch chambers from Applied Materials (Santa Clara, CA) that are used for contact and via etch of customized logic devices, including analog options, LCD drivers, and embedded DRAMs at technology nodes down to 0.32 µm. It had been noted that a number of the chambers were running below their intrinsic productivity level, which translated into an elevated percentage of out-of-control first particle measurements. The performance of the etch chambers at the beginning of the program is shown in Figure 1, which also indicates the average and specification values. The initial approach to improving the productivity level on the underperforming chambers was to refer to a set of "golden system" chambers and try to match the particle behavior of those chambers.

Figure 1: Particle performance of selected oxide etch chambers at the start of the productivity enhancement project (percentage of first particle measurements within the specification of <120 adders).

Selected system chambers were monitored initially, but very few particle excursions were encountered. Therefore, a significantly larger set of chambers was monitored to enable quicker identification of the causes of the particle events. This expanded effort made it clear that many of the excursions were generic—that is, they might occur on any of the identical process chambers at any given moment in time. Thus, it was decided that the way to proceed was to identify as many different particle excursion modes as possible and implement respective corrective actions on all of the chambers. This approach led to a steady improvement of productivity across the oxide etch systems. Examples of some of the excursion modes that were eliminated are discussed below.

Arcing. One type of particle excursion was traced to an arcing problem. Particle measurements performed on monitor wafers showed a progressively higher particle count over time for one particular process chamber. In addition, map analysis demonstrated that the particle distribution changed from an initial quasi-random pattern to a very specific signature with most of the defects near the wafer edge, as shown in Figure 2. Defect review and energy dispersive x-ray (EDX) characterization using a SEMVision defect review system from Applied Materials revealed that there were three distinct contamination phases, as depicted in Figure 3. At baseline, mainly small (≤1-µm) SiO^₂ particles were detected. When the first particle excursion measurements appeared, spherical submicron-sized aluminum oxide (AlO) particles began to be detected along the wafer edge. Finally, large (>1-µm) aluminum fluoride (AlF) particles were detected, indicating a gradual buildup of contamination in the process chamber.

Figure 2: Wafer defect maps from inspections of monitor wafers processed on an oxide etch chamber, illustrating that particle levels increased over time, with many particles near the wafer edge. Measurements were taken on (a) May 4, (b) May 7, (c) May 10, (d) May 11, and (e) May 15.

The particles' composition (aluminum) and distribution (at the wafer edge) suggested that their root cause was arcing at the backside of the wafer. Further analysis of monitor wafers processed in the etch chamber confirmed this theory, revealing traces of backside arcing at a position coincident with a lift-pin position. An examination of the lift pins showed one to be worn and arced, and subsequent replacement and alignment of the pins eliminated this particle excursion mode.

Nonoptimal Parameter Settings. A second excursion mode involved another oxide etch chamber that had yielded frequent out-of-control first particle measurements. Wafer inspection and defect review analysis indicated that most particles added during the oxide etch step were quartz. However, in this case, the information on defect counts, signatures, and composition did not provide a direct indication of the problem's root cause.

Figure 3: Summary of SEM-based defect review and EDX analysis data for oxide etch monitor wafers over time.

A review of the radio frequency (RF) recipe used for particle performance verification revealed that the gas used for this step was not optimal, but changing to the commonly used mixture of CF^₄ and CHF^₃/O^₂ led initially to even-more-severe particle excursions. Two types of particles were detected: aluminum (40%) and quartz (50%). Examples of the honeycomb-shaped aluminum particles are shown in Figure 4.

Figure 4: SEM images of honeycomb-shaped aluminum particles detected on monitor wafers for oxide etch recipe with non-BKM parameter settings. Field of view is 4 µm.

Further investigation demonstrated that several tool parameter settings deviated significantly from those in the best known method (BKM) recipe. The most pronounced deviation was in the RF power ramp-down time, which was longer than the BKM specification. Full implementation of the BKM recipe resulted in a strong reduction of the number of added particles, as shown in Figure 5. The effect of the non-BKM settings on particle performance was confirmed on another etch chamber. Monitor wafers processed in that chamber using the same non-BKM settings also contained a large number of honeycomb-shaped aluminum particles. Because the morphology of these particles was unusual, that information was included when the excursion and its solution were documented in the tool vendor's defect knowledge library.

Figure 5: Particle performance as determined by delta count measurements before and after implementation of BKM parameter settings in the oxide etch recipe.

Particle Backflow. Another excursion mode was related to particle backflow during periods of chamber inactivity. Particle test failures at start-up had been observed consistently on a chamber that was not used continuously for production, although no excursions had been noted when particle checks were performed immediately following its use. In this case, implementation of a reactor laminar flow, which minimizes the effect of particle backflow from the pumpline, resulted in a significant decrease in the particle excursion frequency, as shown in Figure 6.

Figure 6: Particle measurement data for an oxide etch chamber before and after implementation of a reactor laminar flow (RLF) to prevent particle backflow from the pumpline during periods of inactivity. Target specification is <10%.

Eliminating a Defect Pattern on Implanted Wafers

Another project carried out at the Böblingen fab investigated a defect problem encountered on product wafers following processing on a batch-type ion implanter. Several wafers (typically four or five) of each 17-wafer batch suffered from a spatial defect pattern that was not related to a specific position on the implant wheel. In addition, all of the wafers processed in the batches containing affected wafers suffered from high background particle levels. Figure 7 shows a typical defect map of a wafer that exhibited both the pattern and a high defect density. Because wafers in one of the fab's process flows require three different implants on this type of system, overall process-line yield was being significantly affected, as illustrated in Figure 8.

Figure 7: Example of the defect signature observed on an implanted wafer. (The wafer was intentionally rotated prior to implant by 180°.) Also shown is a projection of the implant tool's inner gripper (red dashed-line circle) and magnified view of the defect cluster in the solid-line circle.

Detailed EDX analysis of the detected defects indicated that the particles did not contain any metal, thereby eliminating the investigators' initial suspicion of arcing as the problem's root cause. Most particles were silicon or carbon fluoride.

A more-detailed analysis of the wafer maps revealed that the signature pattern appeared to be a segment of a circle (as illustrated in the magnified portion of the wafer map in Figure 7). A review of the implant system's component configuration by a hardware expert revealed that the radius of this circle exactly matched that of the inner gripper plate used to place the wafers on the implant wheel (represented by the dashed-line circle in Figure 7). This hypothesis, which suggested that the particle problem was related to the wafer-handling unit, was confirmed when the defect signature disappeared after the inner gripper plate was replaced by a dummy.

A closer examination of the gripper's performance revealed that overshooting occasionally occurred, resulting in contact between the wafer surface and the plate. Subsequent adjustment of the gripper hardware permanently solved the particle problem; the original gripper plate was reinserted without further particle excursions. In addition, after the gripper hardware was optimized, the background defect density on all processed wafers was maintained at the baseline level.

Reducing Postsputtering Defect-Density Levels in a Metal PVD Process

A third project, undertaken at the Philips Semiconductors MOS4YOU fab (Nijmegen), focused on Endura PVD titanium (Ti) sputtering tools from Applied Materials. These PVD systems are used to manufacture logic devices with options, including nonvolatile memory, at technology nodes down to 0.15 µm. A recent equipment defectivity evaluation at the facility had found that median defect-density levels following Ti sputtering were significantly higher than the benchmark. Thus, the main goal of the project was to return to and maintain the benchmark level.

The fab's bare-wafer production-monitoring scheme used a 6420 double dark-field tool from KLA-Tencor (San Jose) before and after Ti sputtering, resulting in a differential defect count. A new scheme, in contrast, used a more sensitive WF-736 dark-field inspection system from Applied Materials to compare wafer defect maps obtained before and after Ti sputtering, resulting in true adder data. This capability enabled the investigators to focus their review and characterization efforts on those defects added during processing.

Figure 8: The impact of the ion implant system's poor particle performance on process line yield (PLY) during the processing of lots 51–66.

During the project's initial monitoring phase, results based on the bare-wafer production-monitoring scheme demonstrated that median defect- density levels had returned to the benchmark for most of the Ti sputtering systems. This finding can be attributed to the hardware adjustments that were implemented immediately after completion of the equipment defectivity evaluation. However, initial results using the state-of-the-art dark-field monitoring scheme suggested that typically as many as 20 adders were detectable following the Ti sputtering step.

The defect map comparisons also revealed that a significantly higher number of defects were present on monitor wafers prior to sputtering than after. SEM defect review and EDX analysis demonstrated that the defects found on the monitor wafers prior to sputtering were very similar in size, morphology, and composition to the true adders (excluding the Ti component in the EDX spectra for the postprocess particles) present after Ti sputtering.

Figure 9: Schematic representation of the process flow of out-of-the-box wafers used to monitor the Ti sputtering process (red circles) and a simplified process flow that was used as a reference (green circles).

In contrast, analysis of monitor wafers processed directly out of the box, which did not undergo any process steps before sputtering, demonstrated that they had no defects before or after the Ti sputtering process, as can be seen in the lower half of Figure 9. The out-of-the-box wafers were processed together with standard monitor wafers, which again were found to contain a high number of adder defects. These results suggested that the defects detected on the monitor wafers and identified as true adders were not, in fact, related to the sputtering tool. In addition, many of those defects disappeared during Ti sputtering, suggesting that they were mobile and that most were previous-layer defects that had migrated during the sputtering step. The decrease in small particles on the monitor wafers that had been detected before the sputtering step may have been related to the degas step of the monitoring sequence.

The next step was to investigate the only two processes performed on the standard monitor wafers prior to Ti sputtering: laser marking and wet chemical cleaning (the standard RCA clean). Although the laser marking process was shown to add a large number of particles to the monitor wafers in some cases, the particles' size, morphology, and distribution were not consistent with the defects that had been observed previously before Ti sputtering. An additional test, in which monitor wafers were processed only in the RCA-cleaning system, demonstrated that this equipment was the source of the types of particles observed on the monitor wafers before Ti sputtering.

The fab's RCA-clean system processes four lots at a time, and the types of defects present on the monitor wafers were found to vary depending on the production lots that were cleaned with them. Two types of particles were detected on the clean monitor wafers using SEM and EDX analysis: submicron-sized (typically 0.3–0.5-µm) carbon and carbon fluoride (CF) particles, and larger (>=1.0-µm) CF and SiO^₂ particles. An example of each type of particle is shown in Figure 10. The smaller particles were typically observed when the monitor lots were processed with production lots that received a resist strip after etch, while the larger particles were seen on wafers processed with production lots that had undergone oxide deposition. These results demonstrate that the RCA clean is not fully efficient in removing particles and that cross-contamination may occur when monitor lots are processed with production lots.

Figure 10: Examples of defects typically detected on the monitor wafers after RCA cleaning and prior to Ti sputtering: (a) submicron-sized (0.3-µm) carbon particle detected when the wafers were processed with production lots that received a postetch resist strip, and (b) a larger (~1-µm) defect detected on wafers cleaned with production lots that had undergone oxide dielectric processing. Field of view is 2 µm for (a) and 4 µm for (b).

Inspections of monitor wafer maps using the state-of-the-art dark-field inspection system revealed that the numbers of particles added during the RCA clean varied greatly. Total postprocess counts reached as high as 1000 for the small carbon and CF particles, and a count of 10 was typical for the larger CF and SiO^₂ particles. Superimposing defect maps of monitor wafers processed in the RCA cleaning equipment containing the smaller particles revealed a clear spatial signature consisting of two defect lobes near the wafer edge, as seen in Figure 11. This particle distribution is a consequence of the rotational movement of the wafer cassettes during the RCA clean. To address this issue, a program to improve the cleaning tool has been implemented at MOS4YOU.

Figure 11: Superimposed wafer maps of monitor wafers containing submicron-sized carbon and CF particles. The resulting stacked map reveals spatial defect signature consisting of lobes near the wafer edge.

Conclusion

Three defect-reduction and productivity-enhancement projects carried out at Philips Semiconductors showed the value of adopting a methodical approach to process equipment–related particle contamination problems. Such a methodology results in permanent solutions, not just problem masking. SEM-based defect review and characterization was found to play a central role in this approach, making it possible to quickly identify main defect types and trends. The synergy of process (equipment) and defect metrology knowledge developed by the equipment manufacturer was shown to be advantageous in solving equipment issues together with the chip manufacturer.

Acknowledgments

The authors wish to thank the Applied Materials customer productivity support and technology organizations in Nijmegen, The Netherlands, and Böblingen, Germany, for their continuous support during the defect reduction projects.

References

1. CR Brundle and Yuri S Uritsky, "Particle and Defect Characterization," in Handbook of Silicon Semiconductor Metrology, ed. Alain C Diebold (New York: Marcel Dekker, 2001), 550.

2. Jaim Nulman, "Using Process Tool Automation to Increase Efficiency and Productivity in 300 mm Factories," Semiconductor Fabtech 13 (March 2001): 245–247.

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Robert Schreutelkamp, PhD, is a technologist in the Philips global account team of Applied Materials Europe. Previously, he held positions in applications and marketing for the company's process diagnostics and control division. He received a PhD in physics from the University of Utrecht, The Netherlands. (Schreutelkamp can be reached at +31 24 3512039 or robert_schreutelkamp@amat.com.)

 

 

Marc van der Reijden is a process technologist in the Philips global account team of Applied Materials Europe. He works in the areas of etch and CVD. He received an MS degree in electrical engineering from the Technical University of Twente, The Netherlands. (van der Reijden can be reached at +31 24 3512014 or marc_reijden@amat.com.)

 

 

 

Tim King is a process support engineer for metallization in the Philips global account team of Applied Materials Europe. He has worked for the company for 10 years in the fields of ion implant, etch, PVD, RTP, and MCVD. Before joining the company, he worked for Philips Semiconductors in The Netherlands and the UK, where he was involved in development work in IC assembly techniques. (King can be reached at +31 24 3512053 or tim_king@amat.com.)

 

 

Kristina Mast, PhD, is a process engineer in the Philips global account team of Applied Materials Europe. She is responsible for ion implantation processes. She received a PhD in chemistry from the University of Kaisers-lautern, Germany. (Mast can be reached at +31 24 3512064 or kristina_mast@amat.com.)

 

 

 

Jaap Zondag is technology manager in the global Philips account team of Applied Materials Europe. Previously, he worked in sales and marketing for the company's Philips account group and the etch division. Before joining Applied Materials, he worked at Philips Semiconductors in Nijmegen as part of the bipolar process development group. (Zondag can be reached at +31 24 3512026 or jaap_zondag@amat.com.)

 

 

Hartmut Sahr is team leader of the etch group at Philips Semiconductors in Böblingen, Germany. For more than 25 years he has been involved in the semiconductor industry in the areas of hot equipment engineering, CVD process engineering, and etch process engineering. In addition, he spent two years on assignment at IBM in Burlington, VT, working on semiconductor manufacturing projects. (Sahr can be reached at +49 7031 185822 or hartmut.sahr@philips.com.)

 

 

Jan Cavelaars is a senior process engineer in the metrology and defect reduction group at Philips MOS4YOU wafer fab in Nijmegen, The Netherlands, where he has worked since the facility started up in 1995. His responsibilities include defect control strategies, defect-related improvement programs, interface to defectivity operations, maintenance of group procedures, and defect casebooks. Previously, Cavelaars served as a tool owner of various defect metrology systems. He received an MS in applied physics from Twente University of Technology, The Netherlands, and undertook a two-year process and product designer's course at the Technical University of Eindhoven, The Netherlands. (Cavelaars can be reached at +31 24 3534393 or jan.cavelaars@philips.com.)

Mario Swaanen is a process engineer for PVD metallization at the Philips Semiconductors MOS4YOU fab in Nijmegen. He joined the company in 1995 as a process engineer for PVD metallization. From 1999 until 2001 he was a development engineer for advanced metallization at STMicroelectronics in Crolles, France. (Swaanen can be reached at +31 24 3535117 or mario.swaanen@philips.com.)

 

 

Liang Shi, PhD, is section manager in the metrology and defect reduction department at the Philips Semiconductors MOS4YOU fab in Nijmegen. Previously, he held process integration and defectivity positions at the fab and participated in 1996–1997 in a joint embedded flash memory development program at TSMC (Hsinchu, Taiwan). Before joining Philips Semiconductors, he held several technology positions at Delft Instruments and Unilever. He received MS and PhD degrees in applied physics from the Delft University of Technology, The Netherlands, where he also spent several years in a postdoctoral position in the area of InGaAsP-based optoelectronic devices for optical communications. (Shi can be reached at +31 24 3534521 or liang.shi@philips.com.)