The banter started to heat up during the International Sematech workshop and forum held in Los Angeles in late January and continued simmering right on through the annual SPIE Microlithography homecoming in Silicon Valley a month later. Leading the topic hit parade was the industry's new solution for extending the optical-patterning roadmap to 45 nm and possibly beyond—immersion lithography.

The grizzled veterans of the chip wars have never seen anything quite like the rapid ascent of IML. In a show of openness and cooperation that Sematech's Walt Trybula called "unprecedented in the industry" and a "marvelous [example] of what can happen when we work together," the litho community has moved through the investigative stage to actual tool-delivery plans in a little more than a year. Talk about reduced cycle times!

The industry started getting serious about the wet option at a December 2002 workshop, tasking the user, supplier, and research communities with identifying the critical issues and finding out where the showstoppers might be. The initial list of 63 significant items was whittled down to a top 10 by July 2003. By January of this year, the bullet items had been examined closely, and the initial verdict was in: there seem to be no major dents in IML's proof-of-concept armor, no fundamental showstoppers that would prevent wet litho's implementation.

Of course, even though the science and infrastructure elements appear sound, plenty of engineering challenges lie ahead for the heir-apparent technology. At the top of the critical-issue list are defects, including such novel phenomena as microbubbles and water quality. (My favorite question asked at the L.A. workshop: "What is water?") As MICRO contributing editor John Conroy relates in our lead Industry News story this month, IML defectivity issues still weigh on many of those involved.

"Everything looks good until the tools get in the fab and guys can compare them with their existing dry process where they have lots of yield data," Sematech and Motorola man Will Conley told us.
"The results will determine whether immersion continues." Anyone who's worked at integrating new materials or toolsets on the fabrication floor is painfully aware of how new, previously unseen defect mechanisms can slow down yield ramps. Just ask the early adopters of CMP or copper interconnect.

Attendance at the IML-related presentations at the SPIE event reflected the industry's burgeoning interest. Standing-room-only crowds packed the immersion-related sessions, while in the exhibit hall suppliers involved in the wet stuff had their talking points in order.

JSR Micro's Mark Slezak pointed out that for the first time, with IML, you have to be concerned with the lens actually contaminating the resist, adding that the company's main research focus now is the investigation of water–resist contamination issues. He believes the general maturity of "dry" 193-nm resists will help ease the transition to immersion.

Cymer head honcho Bob Akins told me that the optics train is not as efficient in IML, citing polarization control as the key to maximizing contrast. He called it "dumb luck" that his company's ArF light-source system's two-stage design happens to be ideal for the wet process. Immersion was not the only thing on the executive's mind, though. Since source issues are seen by some as the main stumbling block on the development path to extreme-ultraviolet lithography, Akins said they are accelerating their already "aggressive" EUVL R&D, helped in part by Intel's recent $20 million investment in Cymer's efforts.

IML's emergence has raised fresh questions about EUVL. If, as TSMC's Burn Lin and others have posited, immersion can be extended to the 32-nm node—and maybe beyond, given the industry's propensity to squeeze more out of optics than anyone dreamed possible—will the next-generation platform ever be a realistic option? Intel has bet millions on EUVL, but some see those odds lengthening.

Tom Cheyney
Editor
tom.cheyney@cancom.com