Thermal Processing

Using a noncontact stacked-hot-plate system to cure spin-on dielectrics

Mauro Sironi, Angelo Pesci, Gino Clemente, and Marco Colli, STMicroelectronics; and Takashi Fukada, Michel Ouaknine, and
Woo Sik Yoo, WaferMasters

Already widely used, spin-on dielectrics (SODs) are expected to remain one of the materials of choice for low-cost, interlevel planarization of multilevel interconnects. The SOD process involves spinning and annealing (baking and curing) a nonconductive material onto the underlying substrate at low temperatures ( up to 400°C).

To ensure the desired thickness and physical properties of the resulting SOD films, the thermal treatment used to remove the solvents contained in the dielectric material must be optimized. An excessively rapid thermal treatment can cause the polymerization of the surface and prevent adequate moisture or solvent evaporation from the bulk of the SOD. Outgassing can cause trapping of hot and volatile compounds under the fully polymerized SOD surface layer. These trapped compounds contribute to cracking and blistering of SOD films and may result in a large number of particles being generated during annealing. To provide sufficient time for outgassing of the solvents and moisture, the baking and curing processes must be performed very gradually.

Typically, SOD materials are baked on using direct-contact hot plates and cured in batch furnaces. However, the potential for thermal shock during the baking cycle makes control of the process difficult. Baking in direct-contact systems also may cause film cracking and particle generation, while conventional batch furnaces may generate particles that require a postcure wet-cleaning step to remove. In addition, the long process cycle and large batch size associated with batch furnaces adds queuing problems for small production lots.

To address such challenges, a novel siloxane-based organic spin-on-glass (SOG) annealing process using a noncontact, stacked-hot-plate system was introduced at the STMicroelectronics AG1 fab in Agrate, Italy. This article describes the qualification of that system. Data from subsequent production runs over a 6-month period are also included.

Equipment and Materials

Annealing Systems. The experiment discussed in this article used an SAF-150/200 AP resistively heated, stacked-hot-plate-based annealing furnace from WaferMasters (San Jose) with an operating-temperature range of 100°–450°C. The system was developed to provide a single-wafer signature, lot-size flexibility, reasonable productivity, and few facility requirements. It contains six stacked aluminum hot plates and can process five 150- or 200-mm silicon wafers simultaneously. This design allows the gradual heating of wafers that is required for low-temperature annealing applications, without sacrificing productivity.

Figure 1: Photograph of the noncontact annealing system configured to handle one 200-mm wafer cassette.

The system can be configured for single- or double-cassette operation and as an airtight (gas ambient–controlled) or atmospheric environment. The dimensions for the atmospheric system chosen for this project, which is capable of accommodating one 200-mm wafer cassette, are 600 X 1200 X 1700 mm. This atmospheric pressure version of the system, which is shown in Figure 1, does not require any process gases, compressed air, or cooling water. Its average power consumption during operation at 450°C is less than 5 kW.

Figure 2 shows a diagram of the system and a larger sectional view of the stacked hot plates. Each hot plate has an embedded heater for temperature control and is significantly larger in diameter (300 mm) and thicker (30 mm) than the process wafers to provide a nearly isothermal processing environment. When temperature uniformity of the individual hot plates was characterized using infrared thermography in the temperature range of 100°–450°C, the variation was within ±1.0°C at 400°C. This excellent temperature uniformity is due to the relatively large thickness of the hot plates and the large thermal conductivity of aluminum (2.3 W/cmK).¹

Figure 2: Schematic diagrams of (a) the noncontact annealing system for 150- or 200-mm wafers, and (b) the system's stacked hot plates with standoffs.

As seen in the close-up, standoffs are used to maintain a precise, equal distance between each wafer and the adjacent hot plates. The standoffs are equally spaced on the bottom five hot plates on a perimeter at approximately 70% of the wafer diameter; the gap between the hot plates is 20 mm. During processing, wafers are placed on the standoffs and noncontact heating from the hot plates above and below them occurs by conduction and natural convection, thereby preventing thermal shock and ensuring a gradual rise in temperature. By using the stacked hot plates as the heat source (two plates for each wafer), the loading effect that is normally observed in conventional batch-processing systems is eliminated. Individual wafers are surrounded by heat, in contrast to the wafers being virtual heat sinks, as is the case with conventional systems.

A previous study of the noncontact system's wafer-temperature profiles revealed that annealing using stacked hot plates provides gentle wafer heating and repeatable process results.² The system was also found to minimize wafer warpage and outgassing in low-temperature annealing processes such as SOG anneal, photoresist bake, and polyimide anneal.^3–5 For processes that require a precise process environment, a chamber vacuum enclosure, process gas lines, a vacuum pump, and a pressure control function can be added to the system. Such a process ambient–controlled version has demonstrated excellent results in oxygen-sensitive processes such as copper and aluminum anneals, and nickel silicide formation.^6–9 The system can also be used in annealing applications involving III–V compounds (gallium arsenide, indium phosphide, and the like).

SOG Film. During qualification testing of the annealing system, an inorganic siloxane-based SOG material (Honeywell 512B; Honeywell Electronic Materials, Sunnyvale, CA) was used to create dielectric films with an as-spun thickness of 550 nm on 150-mm wafers for evaluation. Baking was performed via sequential exposures of 60 seconds each at 80°, 150°, and 250°C in conventional direct-contact hot-plate systems. The wafers were cured in the SAF-150/200 AP system using various annealing times (250–450 seconds), temperatures (380°–420°C), and 1-atm air. To ensure consistent and reliable results, the time between SOG film preparation (coating and baking) and curing was kept constant at 60 minutes.

Figure 3: Postcure SOG film shrinkage as a function of (a) heater temperature and (b) heater wafer slot.

Results and Discussion

The film thickness, uniformity, and refractive index of SOG films before and after annealing in the noncontact hot-plate system were characterized as a function of curing temperature and time. The target postcure film shrinkage was 3.5 to 4.0%, while the target refractive index was 1.390 ±0.005. A typical refractive index for thermally grown oxide is 1.460, and the refractive index of the as-baked (precure) SOG films ranged from 1.422 to 1.424.

As curing temperature and time increased, the films shrunk and the refractive index decreased as a result of film densification and solvent removal. The refractive index of SOG films annealed at 420°C for 450 seconds dropped to as low as 1.387. Figures 3 and 4, respectively, show the thickness and refractive index change of SOG films after annealing using various temperatures and times. It can be seen that the target thickness shrinkage of 3.5–4.0% was obtained on wafers processed between 400° and 420°C by curing for an appropriate time period. The target shrinkage was achieved at 380°C when wafers were cured for at least 450 seconds. To maintain good productivity, five isothermal cavities were used, with five wafers processed simultaneously. Slot-to-slot repeatability was excellent and within measurement error; the average thickness uniformity was almost unchanged under all curing conditions.

Figure 4: Refractive index of SOG films before and after curing at 400° and 420°C for various times.

Pre- and postcure film stress and Fourier transform infrared (FTIR) spectra of SOG films were also measured. The film-stress change after curing in the noncontact system was equivalent to that for conventional batch-furnace-cured SOG films. The FTIR spectra shown in Figure 5 reveal that there was a significant reduction of the OH group following annealing, and that the pre- and postcure Si peaks were distinct, indicating the presence of different Si compounds. A reduction of H₂O content in the film after curing at 450°C for 350 seconds was confirmed by these spectra.

Figure 5: FTIR spectra of SOG films before and after curing at 400°C for 350 seconds.

It is difficult to maintain production-quality film shrinkage and particle performance when using direct-contact hot-plate systems and conventional batch furnaces. In contrast, by using the noncontact annealing system, it is possible to control SOG film properties under a wide range of process conditions without generating cracks and particles. Following the release of the qualified system for production use at the AG1 fab, its film-shrinkage and particle performance were measured regularly between runs. Particles larger than 0.2 µm were tracked. Figures 6 and 7 show film-shrinkage and particle performance data, respectively, over an extended period in a full production environment. On average, only one particle was added per 150-mm wafer, and the particle performance of the five individual wafer slots was almost identical. The system's gentle heating of the wafers and convection flow of outgassed species to the exhaust on top of the system clearly help prevent particle generation.

Figure 6: SOG film shrinkage performance of the noncontact annealing system over a 6-month period in a production environment.

The system was also found to provide lot-size flexibility without sacrificing productivity. A throughput of 41 wafers per hour has been achieved using a 350-second curing processes, and an average of 10,000 wafers were processed per month during the first 9 months following system installation without any unscheduled downtime. At another STMicroelectronics site, an identical system is used alternately for SOG and polyamide curing production without any evidence of cross-contamination.

Figure 7: Particle performance of the noncontact annealing system over a 6-month period in a production environment.

Conclusion

To improve a fab's manufacturing capabilities, a stacked-hot-plate-based annealing system was evaluated as a potential alternative to conventional SOG curing equipment. The system's performance was extensively characterized before its release to production. SOG films were cured under various conditions and their physical properties—such as film shrinkage, refractive index, and water content—were measured. Following the adoption of the system, long-term process repeatability and particle performance data were collected over an extensive period. The system was shown to be very reliable, yielding repeatable process results with high productivity. Its good particle performance (~1 particle adder per wafer) eliminated the need for the postcure wet-cleaning step that had been performed previously. Thus, the system provides very high economic value, not only from a reliability point of view, but also through process simplification.

References

1. DR Lide, ed., chap. 6 and 12, CRC Handbook of Chemistry and Physics, 75th ed. (Boca Raton, FL: CRC Press, 1994).

2. WS Yoo and T Fukada, "Wafer Temperature Characterization during Low Temperature Annealing," in Proceedings of the Electrochemical Society vol. 2000-9, (Pennington, NJ: ECS, 2000), 355.

3. WS Yoo, T Fukada, and J Yamamoto, "Hot Plates," European Semiconductor (April 2001), 129.

4. WS Yoo et al., "Spin-on-Glass Bake and Cure Using Resistively Heated Batch Annealing Oven," in Proceedings of the Electrochemical Society vol. 2001-9 (Pennington, NJ: ECS, 2001), 401.

5. WS Yoo, T Fukada, and J Yamamoto, "SOG Annealing Applications Using a Hot Plate-Based Mini-Batch System," Future Fab International 11 (2001): 232.

6. L Castoldi et al., "Annealing Characteristics of Copper Films for Power Device Applications" (presented at the 203rd Electrochemical Society Meeting, Paris, 2003).

7. L Castoldi et al., "Thick Copper Interconnection Annealing Process Development Using a Mini-Batch Stacked Annealing Oven," Semiconductor Fabtech 18 (2003): 149.

8. T Murakami et al., "Nickel Silicide Formation Using a Stacked Hotplate-Based Low Temperature Annealing System" (presented at the 203rd Electrochemical Society Meeting, Paris, 2003).

9. T Murakami, V Carron, and WS Yoo, "Advanced Devices Using Low-Temperature NiSi Formation," Solid State Technology 46 no. 9 (2003): 32.

Mauro Sironi is responsible for back-end-of-line process engineering activity at STMicroelectronics' AG1 fab in Agrate, Italy. Before joining the company in 1996, he held a research position at the Istituto Nazionale di Fisica della Materia in Milan and at the European Organization for Nuclear Research (CERN) in Geneva. Sironi has published scientific articles about GaAs cryogenic devices. He received an MS in physics from the Universitá degli Studi di Milano. (Sironi can be reached at +39 039 6035070 or mauro.sironi@st.com.)

Angelo Pesci is responsible for chemical vapor deposition (CVD) and SOG process engineering at STMicroelectronics. Before joining the company in 2001, he held a research position from the Istituto Struttura della Materia at the synchrotron radiation facility Elettra in Trieste, Italy. Pesci has published six articles in the area of surface science. He received an MS in physics from the Universitá degli Studi di Trieste. (Pesci can be reached at +39 039 6037305 or angelo.pesci@st.com.)

Gino Clemente is in charge of all CVD processes for intermetal dielectric and passivation levels at STMicroelectronics. In addition, he is involved in SOG, planarization, subatmospheric CVD, and high-density plasma processes. He is also project leader for area automation. He holds a patent for a new application using SACVD technology. (Clemente can be reached at +39 039 6036492 or gino.clemente@st.com.)

Marco Colli is a CVD and SOG process engineer at STMicroelectronics, which he joined in 1999. He performed thesis work at Pirelli Labs on fiber optics doped with erbium for optical amplifiers and received an MS in physics from the Universitá degli Studi di Milano. (Colli can be reached at +39 039 6037305 or marco.colli@st.com.)

Takashi Fukada is responsible for process engineering activities at WaferMasters (San Jose). He has held process development engineering positions at Sumitomo Metals, Lam Research Japan, and Mattson Technology Japan. Fukada has published 10 technical articles on electron cyclotron resonance-CVD and thermal processing. He received BS and MS degrees in electrical engineering from Kyoto Institute of Technology in Japan. (Fukada can be reached at +81 96 2875027 or takashi.fukada@wafermasters.com.)

Michel Ouaknine is responsible for WaferMasters' European operation in Paris. He gained more than 10 years of semiconductor equipment experience at Mattson Technology and Genus, and has also held several applications and design positions at Western Digital, Zilog, and Intel. He received an electronics engineering degree from the Conservatoire National des Arts et Metiers in Paris. (Ouaknine can be reached at +33 1 43389110 or michel.ouaknine@wafermasters.com.)

Woo Sik Yoo, PhD, is president and chief technical officer of WaferMasters. He has served as a research and process engineer at ATMI, Novellus Systems, and Lam Research. He has also held positions as senior product technologist and product marketing manager at Mattson Technology. Yoo has written more than 100 papers on rapid thermal processing, dielectric plasma-enhanced CVD, and wide-band-gap compound semiconductors. He received a BS degree in electronic engineering from Dongguk University in Seoul, South Korea, and MS and PhD degrees in electrical engineering from Kyoto University in Japan. In addition, he received an MBA degree from Western Connecticut State University in Danbury. (Yoo can be reached at 408/451-0856 or woosik.yoo@wafermasters.com.)