Jose hosts SPIE litho show
than 3000 attendees are expected when the SPIE Microlithography symposium
and exhibition moves to its new home at the San Jose Convention Center.
Short courses begin Sunday, February 27, while the plenary sessions for
the 30th annual event kick off the main conference schedule on February
28. The exhibit hall will be open for two days, March 1–2.
plenary presentations highlight the first full day of the conference.
Christopher Spence of AMD will discuss full-chip CD analysis and design
optimization for the 90-nm node and below. The second talk will be given
by Applied Nanotech CEO Zvi Yaniv and will examine the flat-panel-display
paradigm and how the continuous parallel progress of microlithographic
processes has fostered the success of FPDs. The final plenary speech—which
provides a historical overview of lithographic approaches that haven't
(yet) made it and the lessons learned from the development of those technologies—will
be delivered by Stanford University professor R. Fabian Pease.
six core conferences run the gamut of the lithographic and metrological
focus areas: resist technology and processing; metrology, inspection,
and process control; emerging lithographic technologies; optical microlithography;
data analysis and modeling for process control; and design and process
integration for microelectronic manufacturing. Two poster sessions featuring
hundreds of additional papers supplement the main sessions on the evenings
of February 28 and March 3. There are also several nighttime panel discussions
during the week.
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© 2007 Tom Cheyney
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