at the Crossroads
One Solution Fit All or Will Segmentation Take Place?
Moslehi, PhD, is chief technology officer and senior vice president,
semiconductor technology research, for The Noblemen Group, a boutique
investment banking, strategic advisory, and business development firm.
Moslehi has 20 years' experience working in the semiconductor and semiconductor
equipment industries. He can be reached at email@example.com.
continues to be the most expensive and important technological challenge
facing the semiconductor industry. Patterning has always been at the core
of chipmaking. Optical lithography tools and processes, materials, and
technologies in various forms and incarnations have played an increasingly
prominent role in the wafer fab. Over the past few decades, different
implementations of optical lithography have enabled scaling of semiconductors
to ever-smaller feature sizes—from 200 Ám in the early days to at
least 32 nm within this decade. During this time, people have periodically
predicted optical's demise. Instead, a constant flow of ideas and major
practical innovations by countless engineers and scientists have extended
the capabilities of the incumbent optical technologies far beyond the
limits of what was once considered possible.
the dawn of the industry in the 1960s, optical lithography was based on
contact printing, which gradually reached its practical limits because
of defects and damage resulting from the contact between the photomask
and the photoresist on the wafer. Proximity printing, which separated
the mask from the resist-coated wafer by a few tens of microns, solved
these problems. Projection aligners entered the market in the early 1970s,
eliminating the need for putting the mask in close proximity to the wafer.
Projection aligners used all-reflective optics with a low numerical aperture
(NA<0.2) to project and focus the mask images onto the resist. They
were designed to work with the same 1X masks used in proximity printing.
To extend the technology, both proximity and projection printing later
used deep-UV (DUV) illumination.
because of the low-NA optics and the 1X mask quality, in the early 1980s
most believed that ~1 Ám marked the limit for optical lithography. Work
was under way to deploy extreme UV (EUV) and soft x-ray illumination in
proximity and projection printing systems, but those efforts were undermined
by the timely introduction of the reduction step-and-repeat tools (steppers),
which continue to be the industry's workhorses.
the mid-1990s, large-field 248-nm step-and-scan systems (scanners) with
improved resolution were adopted by fabs, with current advanced scanners
using 193-nm DUV ArF excimer lasers capable of 90- and 65-nm processing.
Over the last decade, DUV lithography (DUVL) has been enhanced to where
it can pattern feature sizes below the DUV light source's wavelength.
Subwavelength lithography has become a reality because of major advancements
in tools (scanners, steppers, tracks, metrology) and materials (reticles,
resists) using various optical extension and resolution enhancement techniques,
including optical proximity correction (OPC) and phase-shift masks (PSM).
this phenomenal achievement has been accompanied by escalating costs.
With a price of $15 million to $25 million per system, DUVL accounts for
a significant portion of a fab's capital budget. Furthermore, with each
new node, increasingly complex optical extension technologies have triggered
an exponential rise in mask costs.
subwavelength lithography using 193-nm DUV scanners will likely run out
of steam at the 45-nm node, the development of a host of potential next-generation
lithography (NGL) technologies has accelerated. Originally targeted for
the 0.13-Ám node, NGL is envisioned to ultimately replace optical lithography
and enable continued downward scaling of feature sizes. But major DUVL
innovations and progress in immersion lithography (IML) have pushed out
the NGL timetable.
IML scanners—where the space between resist and lens is filled with
a liquid (e.g., water) having a refraction index higher than air—should
extend the life of optical DUVL, providing a more evolutionary, practical
solution for the next few technology nodes. Over the past two years, IML
has made tremendous progress and appears to be the technology of choice
for 45-nm manufacturing, possibly even for 65 nm. Using fluids with a
higher refractive index than water and a potential NA of >1.5, IML
could be extended to 32 nm, with efforts under way to push it to 22 nm.
Recently, critical levels of commercial 90-nm devices, including SRAMs
and processors, have been successfully processed with "preproduction"
193-nm IML scanners. In addition, 65-nm imaging capability has been demonstrated,
and decreased levels of immersion-related defects have been reported.
Early IML tools are planned for delivery in 2006, with production models
to be ready by 2007–2008. However, an expected price tag of $25
million to $30 million per tool, combined with skyrocketing mask costs,
will make IML an even more expensive process than 193-nm "dry"
recent rapid progress has somewhat eased the urgency for implementing
NGL. Major next-generation candidates include EUV lithography (EUVL),
various incarnations of E-beam lithography (including E-beam projection
lithography and direct-write [DW] maskless lithography), and a new entry—nanoimprint
lithography (NIL). Although there is no NGL consensus, EUVL is considered
the front-runner. Technically, its 13-nm EUV light with multilayer reflective
optics will address the resolution and depth-of-focus issues. Over the
next five years, EUVL must overcome several major technical issues and
challenges, including the lack of a good power source and the need for
new resist formulations. Also, the projected price of at least $40 million
to $50 million per tool will make EUVL prohibitively expensive.
the recent SPIE Microlithography Conference in San Jose, speakers expressed
serious doubts about the future success of EUVL and predicted its ultimate
failure on economic and technical grounds. Of course, the technology's
proponents strongly disagreed. Extensive research is under way to resolve
the many technical issues of EUV. Intel, the technology's most powerful
advocate, is targeting 2009 for EUVL insertion at the 32-nm node, a five-node
pushout from the original target of 0.13 Ám.
lithography has a long history as a proven technology. Traditionally used
for maskmaking as well as low-volume specialty, ASICs, prototyping, and
R&D applications, its low throughput has prevented its adoption for
high-volume chip manufacturing. Current efforts are focused on improving
throughput and solving other technical issues, such as space charge effects.
Because of rising mask costs, maskless lithography, using higher-throughput
DW multibeam systems, has recently generated interest.
With a sub-10-nm resolution
capability and a price per system much lower than that of IML and EUV, nanoimprint
is attracting attention as a potentially disruptive technology. NIL, which
is used in R&D and specialty nonsilicon applications (e.g., storage
media and MEMS), has yet to prove its production worthiness for more-mainstream
semiconductor manufacturing. In NIL, the pattern is transferred from a "template"
onto a special polymer (etch barrier) placed on a "residual or transfer
layer" on the surface of the wafer, which is then optically or thermally
cured. To minimize defects, a release layer is used on the template. This
miniature micromolding process is a form of pattern formation achieved by
problems include low throughput, insufficient overlay capability, and
high defect levels. The last issue causes the most concern among chipmakers.
In addition, NIL still lacks the required support infrastructure. Certain
lessons learned from optical contact printing may help the technology
overcome some of its difficulties. Until NIL becomes more production worthy,
many in the industry will remain skeptical about its viability as an operationally
practical option for nanoscale chip manufacturing. Still, the potential
for huge cost advantages makes it an intriguing NGL candidate.
operational efficiency, and economics must drive the final decision on
choosing the right lithography technology. Economics must factor in the
overall costs, not just the tool costs. This figure includes the total
costs of ownership of tools and materials and must take into account the
dual cost impacts of yield and productivity. The economic viability of
an option for fabs running a high product mix of advanced low-volume products
should be examined, particularly in light of drastically rising mask costs.
Some of these fabs are adopting a hybrid (mix-and-match) approach for
ASICs and prototyping, using DW maskless E-beam for critical layers and
DUVL for noncritical layers. In contrast, fabs processing a low product
mix of advanced high-volume products are pressing for IML and EUVL. Those
selling higher-margin chips are among the strongest EUVL proponents.
examples point to a potential future of industry segmentation and multiple
lithography solutions, with each segment adopting the most economical
approach to best suit its needs and operational requirements. This scenario
could change with a major breakthrough over the next five years—such
as an affordable high-throughput DW E-beam or an economically and technically
viable EUVL—much like how the introduction of steppers revolutionized
chipmaking in the 1980s.
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