CLEANROOM TECHNOLOGIES

Developing an exit charge specification for semiconductor production equipment

Arnold Steinman, Ion Systems; and Julian A. Montoya, Intel

Static charge can cause several kinds of problems in semiconductor manufacturing, including process equipment malfunctions, damaged products, and contamination attraction to product surfaces. Simple calculations indicate that the costs of these problems run in the hundreds of millions of dollars during the course of device manufacturing alone. The control of static charge has become essential in world-class semiconductor factories, and static control methods such as grounding, use of static-dissipative materials, and ionization have been employed successfully.

High-volume production is as essential as are high production yields to achieving profitability in today's competitive marketplace. Volume production requires high-speed automated equipment, which can experience problems when handling static-charged product. The result is either damage to the product or unavailability of the equipment, or both.

The constant increase of process speed requirements means that more product may be damaged by a static charge problem before the problem is detected and the cause determined. It also means that equipment malfunctions have a greater effect on overall product throughput. Lost production time in $1-billion-plus wafer fabs is very expensive time.¹

Electrostatic Problems

Static charge is unavoidable in most production environments, since any motion that causes friction and separation of materials generates charge triboelectrically. Products and process tools are often made of insulating materials that easily store static charge for a long time. Product motion presents many opportunities for contact with grounded surfaces. In the presence of static charge, such contacts inevitably result in electrostatic discharge (ESD) events that may damage the product directly. Even if an event does not affect the wafer directly, the electromagnetic interference (EMI) generated by the ESD event may cause malfunctions of the production equipment. Malfunctions are not limited to the equipment in which the ESD event occurs; adjacent equipment may also be affected. In an environment increasingly controlled by centralized compu-ter systems, ESD events may result in bad data transfers that can affect operations throughout the factory.¹

Equipment malfunctions caused by ESD are well-known but poorly documented. Once the problem has been fixed, generally by the tool user rather than the tool manufacturer, an internal company memo may be the only documentation forthcoming. Certain facts are known, however. Wafer handlers, robots, and metrology equipment are the most susceptible to ESD. Charge is generated on wafers as they are processed. Charge also develops on wafer carriers made of Teflon and quartz. These materials are chosen for their thermal and chemical resistance during processing, rarely for their ability to dissipate static charge. Contact between metal equipment parts and highly charged wafers and wafer carriers results in ESD events, whether or not the equipment parts are grounded. These episodes may damage the wafer or cause random equipment stoppages.²

In addition to ESD-caused difficulties, problems can arise from electrostatic attraction (ESA). When an object is charged, a force is created between it and nearby surfaces. Attraction or repulsion of the object can result in movement or sticking of materials. Two charged objects are not needed for this to happen; a charged surface can induce charge in, or polarize, other nearby surfaces. Such occurrences can be catastrophic in high-speed production tools. Materials jam in moving machinery, damaging both the product and the equipment. Defective products and production time lost to repair and cleanup activities generate significant costs.

Charged surfaces also attract particles, whether the particles were initially charged or not. Particles polarized by the charge on the surface are attracted to the surface. While advanced filtration technology prevents particles from entering the cleanroom from the outside, particles are still generated within the cleanroom itself. Two primary sources of such particles are the production equipment and the processes going on within the equipment. High-speed operation usually worsens particle generation. If the wafers are charged during manufacturing, they are much more likely to attract and hold particles. Unlike static charge interactions with equipment, the effects of static charge on particle attraction are thoroughly documented.^2—4

ESD causes microprocessor-based robotics to stop working or to mishandle the product. It also damages products when they contact grounded equipment surfaces, and can cause unwanted motion and jamming of equipment. Particles generated by the motion of equipment parts are attracted to charged product surfaces and cause defects. These tool-related problems are particularly noticeable in the photolithography, diffusion, and wet station areas of the semiconductor front end and in the sort, marking, and test areas of the back end. For semiconductor manufacturing to be successful, these static-related obstacles must be overcome.⁵ Table I lists examples of these problems.

Victim	Culprit	Consequence
Diffusion furnace	Operator touching ontrol panel	Furnace shutdown with loss of material
Thin-film resistivity tool	ESD from incoming wafers	Lost production time due to unavailability of the tool
Planarization tool	ESD to polisher head due to poor grounding	Lost production time due to lockup
Photolithography reticles	High charges on substrates and carriers	Reticle damage required expensive replacement
Photolithography stepper	Ungrounded wall materials causing ESD events that radiate EMI	Long time to resolve continuing equipment lockups
Test handler	High charges on ICs	Damaged circuit cards disrupted production schedule
Test handlers	Ungrounded ceiling materials causing ESD events radiating EMI	Questionable test reliability due to lockups and calibration failures
Automated materials- handling system	ESD-caused data scramble	System off-line for 1 hour, limiting fab operations
Wafer transfer tools	Static charge on Teflon parts attracting contamination	Unavailability of the tool due to requirements for periodic cleaning
Spin rinser-dryer	Cleaning process generates high charges on wafers and cassette	ESD events occur in the next process tool
Cassette transfer tool	High charge on wafers and cassette from previous process tool	Cassette-handling robot dropped a cassette of wafers

Table I: Static charge case histories.

Electromagnetic Compatibility Requirements

Electromagnetic compatibility (EMC) is an important issue in semiconductor manufacturing. It will become even more important as the logic voltages used in digital electronics decrease, operating frequencies increase, and the use of automated processing expands. EMC must be incorporated as early as possible both in the design of the chipmaking tools and in the manufacturing facility where the equipment will be operated. Neglecting EMC until equipment is already in the field or a facility has become operational leads to reduced equipment availability, expensive retrofits, and, in some cases, adverse impacts on product line yields. Figure 1 shows a conceptual model of how the costs associated with achieving EMC increase as a particular project proceeds. The model holds true whether one is designing a personal computer, semiconductor manufacturing equipment, or a large-scale manufacturing facility.

Figure 1: Costs of EMC implementation.

In the case of a semiconductor manufacturing facility, the costs associated with neglecting EMC can reach tens of millions of dollars. These potential costs include product loss brought on by EMC-related equipment malfunctions that eventually result in the need for a retrofit, the costs of the tool retrofit required to achieve EMC, and the loss of production time while the equipment is unavailable.

EMC issues are not well understood or addressed by personnel who do not have the training or equipment needed to analyze and solve these kind of problems in a timely and cost-effective manner. The result is long recovery times from EMC-related problems that often require expensive retrofits. Designing EMC into the project as early as possible has become essential to achieving cost-effective solutions as well as to the overall success of the project.

The general need for equipment EMC has long been recognized. The U.S. Federal Communications Commission (FCC), the International Electrotechnical Commission (IEC), and other international standards organizations have requirements for the allowable levels of EMI that may be produced by any electronic device. These standards have been revised many times in the last decade, due in large part to the increased presence of electronics in the modern world.

Achieving EMC has become critical in the semiconductor industry because of changing factory designs. High construction costs and the push for increased throughput have forced manufacturers to increase the amount and density of equipment in cleanrooms and assembly areas. Because of the demands on factory floor space, one can no longer physically or electrically isolate different types of tools. Equipment in these environments must neither produce significant levels of EMI nor be affected by EMI produced by other equipment. In order to ensure EMC, automated semiconductor manufacturing equipment must have both low EMI emissions and high EMI immunity.

Requirements for EMC relevant to the semiconductor industry are contained in SEMI Standard E33-94, Specification for Semiconductor Manufacturing Facility Electromagnetic Compatibility. This standard states that the electromagnetic disturbance generated by any equipment must not exceed a level that allows radio, telecommunications, and other apparatus to operate as intended. The equipment must also have an intrinsic level of immunity to EMI to enable it to operate as intended. Appropriate international standards are cited to achieve these goals.⁶

Establishing EMC between equipment requires the control of electrostatic charge. It may be necessary to insist that equipment operation does not produce ESD events or static charge levels that interfere with other equipment or with its own operation. There is considerable literature that deals with suppressing static charge generation and the resulting ESD events, but little information is available that specifies what level of suppression is required to prevent static charge problems in equipment. Most test methods look only for catastrophic product failures,^{7, 8} yet there is also a concern with static levels in automated semiconductor tools that attract significant numbers of particles or interrupt equipment operation.

Requirements for electrical transient immunity are contained in many U.S. and international standards. One of the most commonly cited is IEC 801; IEC 801-2 is the section of this document that recognizes ESD as a source of electrical transients. IEC 801-2 defines immunity requirements for ESD that may be coupled into equipment directly or through radiation, recognizes the human body model—type discharge as a hazard to equipment, and defines discharge networks and test waveforms for ESD simulators. It also defines ESD threat classifications for different types of equipment as well as ESD simulator test voltages for these classifications.

Semiconductor equipment generally must be shown to withstand ESD voltages up to 8000 V. Unfortunately, the voltages resulting from static charge generated during semiconductor manufacturing can easily exceed this level. E33-94 refers to IEC 801-2 for ESD immunity testing. It also specifies that the equipment should pass a test that requires handling product carriers charged to 18,000 V.^{6, 9}

Defining Electrostatic Compatibility

Equipment manufacturers are already required to be responsible for the electromagnetic compatibility of their products. They should also be responsible for the electrostatic compatibility of the same equipment. There are no existing guidelines on what is required to achieve this objective. While good design can reduce or prevent the generation of static charge on parts of the equipment, that equipment must also handle charge generated on the product and its carriers.

Solving static charge problems has usually been the responsibility of end-users, who have employed many methods to reduce the effects of static charge in cleanrooms, including personnel grounding, static-dissipative materials, and air ionization. With automated production methods, however, the charged product has become less accessible for the end-user to apply static control techniques. The trend is to remove the product from the cleanroom and process it in minienvironments or entirely within the production equipment.

The product is often transferred between different pieces of equipment without exposing it to the cleanroom ambient environment and without the involvement of personnel. Numerous transfers of charged products and carriers have resulted in an increasing number of tool-related problems. Table I identifies the victim and the culprit for each problem; in equipment, the connection between the victim and culprit is often the product or the product carriers.

Electrostatic compatibility can be defined, therefore, as a limit on the static charge level on the product or product carrier that is transferred between equipment. Each equipment manufacturer should ensure that whatever process occurs within its tool, product and product carriers will not exceed certain static levels as they exit the equipment. Any standard that defines electrostatic compatibility must avoid interfering with the actual processing that occurs in the equipment.

Equipment Static Charge Task Force

In July 1995 a semiconductor industry working group proposed that static charge limits were needed for products transferred from one piece of equipment to another. This working group is now an official SEMI standards task force whose mission is "to minimize the impact on capital productivity due to the presence of static charge in semiconductor manufacturing environments." The group's specific objective is to create a guideline document with a matrix of acceptable levels of static charge at the input and exit ports of production equipment for the purposes of:

• Reducing equipment lockup problems caused by ESD events that produce EMI.

• Reducing the attraction of particles to charged surfaces.

• Reducing product and reticle damage caused by ESD.

Although the task force recognizes that static charge can have an impact on processing that occurs within equipment, the matrix will be applicable primarily at the equipment's exit port. For this reason it is sometimes referred to as an exit charge specification. Handling any object is likely to change the level of static charge measured on its surface. Many semiconductor manufacturing processes also generate undesirable levels of static charge. Protecting the product or carrier from static charge generation at other points of the process, such as the interior of process tools, must be left to the ingenuity of users and equipment manufacturers. The task force has proposed that the appendix of the guideline document include case histories from users and equipment manufacturers on static charge problems they encountered and how the problems were solved.

Test Methods

There is no single method of testing for static charge that will determine a safe level. The amount of static charge, the distribution of static charge on an object, and the nature of the static discharge interact to determine if the charge level is safe. It is difficult to ascertain levels that guarantee the elimination of static-related problems — the goal will be a significant reduction of these problems. The guideline will attempt to use previously established measurement methods for products, carriers, and process tools. It will be necessary to define a different test methodology for each type of static problem and to understand its limitations.

ESD Damage. When considering direct ESD damage to a device, one interesting parameter is the total amount of charge that may be transferred to or from the device when it comes into contact with another object. There are test methods for determining the threshold of damage to a particular device.^{7, 8} Under an agreed-on set of test parameters, the damaging amount of charge transferred to or from the device can be ascertained.

In the context of production equipment, one must know the charge on the product, its carriers, and any other objects that might directly contact the tool. The unit for charge is the coulomb, or more conveniently, the nanocoulomb (10^—9 C). Charge can be measured with a Faraday cup, shown in Figure 2. A charged object, like an integrated circuit, is placed in the cup and a reading is taken of the charge on it. An instrument must be created with a cup large enough to accommodate wafers, cassettes, and other equipment parts. These items must not come into contact with other objects in the process of placing them in the cup, in order to avoid altering charge levels on them.

Figure 2: Diagram of a Faraday cup.

Particle Attraction. The electrostatic attraction of particles is influenced by the electrostatic field generated from the charge on the surface of an object. Both the field strength and the divergence of the field affect the rate of particle deposition. Deposition is also influenced by the size and concentration of particles, the length of time the product is exposed to the particles, and whether there is any charge on the particles. Even under the most controlled laboratory conditions, accurate measurements of all these variables are difficult.

Measurements of electrostatic field can be made with an electrostatic fieldmeter and expressed in units of volts per inch (or volts per centimeter). Unfortunately, the presence of the measuring instrument changes the field characteristics and may understate the actual level of the electrostatic field, as shown in Figure 3. There is already a SEMI test method that describes measurement techniques that use an electrostatic fieldmeter.¹⁰

Figure 3: Electrostatic field measurement.

The deposition velocity of particles onto a surface is connected to electrostatic field strength.^11,12 It is difficult to gather the additional information needed to calculate what might be a safe level of field from a static charge. It may be possible for the purposes of the exit charge guideline to correlate a measurement of particle deposition with an electrostatic field measurement. Particle concentrations in the air and on surfaces both can be measured with reasonable accuracy.

Equipment ESD. For true ESD immunity, an ESD event in equipment must not disturb either the equipment it occurs in or any other nearby tool. The charge on product or carriers transferred from one piece of equipment must not disrupt the operation of subsequent equipment. It will be a systems issue to make sure that all equipment in a facility meets the required ESD immunity standards.

Reactions to an ESD event in equipment run from automatically corrected transient errors to tool-damaging hard errors. Small numbers of transient errors may be acceptable from an equipment operation point of view but still cause unacceptable product losses. ESD immunity standards allow increasing numbers of transient errors at voltages exceeding 8 kV;¹³ industry experience, however, indicates that many ESD events occur at discharge voltages > 8 kV.

Equipment ESD immunity is addressed by several international standards, including IEC 801-2 and EN 50082-2 for European CE compliance. The standards describe how measurements are made with an ESD simulator; it is used to create both a direct discharge to the surface of the equipment and an air discharge to a surface that is 4 in. away from the equipment.

The ESD simulator charges a 150-pF capacitor (C) to a known voltage (V) and then discharges it to produce a standardized discharge waveform. Knowing the voltage and capacitance involved in this test means the total charge (Q) can be calculated by the equation Q = CV. For example, a 4000-V discharge (IEC 801-2 test level) transfers a charge of 600 nC.¹³ While this test method involves the transfer of 600 nC of charge, it does not imply that any other combination of voltage and capacitance equaling 600 nC will produce the same effect. It also does not imply that a transfer of charge from any other object will affect the equipment in exactly the same way as the ESD simulator.

The guideline matrix proposes that in order to provide ESD immunity for an individual piece of equipment from static charge on products and carriers, the charge on these items should be kept below the levels determined by simulator testing. The Faraday cup measurement would again be used to determine the charge on products and carriers. If equipment has been tested for ESD immunity and passes a 4000-V test, then the total charge on product and carriers leaving this equipment should be kept below 600 nC. Any product transferred at this level should not be handled by equipment with a lower ESD immunity. Figure 4 depicts a possible implementation of this test method. Research is needed to test the method's validity.

Figure 4: Setting ESD immunity thresholds.

Guideline Matrix

The task force has yet to make any decisions on static charge levels, electric field strengths, or a particular test methodology. A possible matrix proposal is shown in Table II. Level 1 compliance means that products and carriers will not leave the equipment with more than the indicated amounts measured on them according to a defined test method. This level essentially states, first, that the equipment is used in a process that presents no significant problems handling charged product and, second, that there are no contamination or ESD damage issues.

Compliance Level	ESD Damage (Total Charge) (nC)	Contamination (Fieldmeter Test) (V/in.)	Equipment Lockup (ESD Immunity Test) (nC)
1	1000	10,000	1500
2	100	1000	600
3	10	500	400
4	1	250	150

Table II: Proposed allowable levels of charges, contamination, and ESD immunity.

At compliance levels 2, 3, or 4 the most serious static charge problem must be decided. Level 4, for example, will be used primarily by manufacturers of specialized components, such as gallium arsenide semiconductors or magnetoresistive disk-drive read heads, or by those using specialized equipment with low ESD or EMI immunity.

If contamination is the problem and the product will be exposed to particles for a long time after leaving the equipment, the user might specify that product and carriers leaving that equipment not produce electrostatic fields over 250 V/in. (level 4 contamination). A much shorter exposure to the same level of particles might allow the presence of electric fields measuring 1000 V/in. (level 2 contamination).

If the product may be damaged by ESD events, but only by those discharges >20 nC (200-V human body model test⁷), then neither product, carriers, nor equipment parts should store charge >10 nC (level 3 ESD). Clearly, the lower the level of static charge allowed, the more static control measures the equipment manufacturer will need to install and the higher the cost of the equipment to the end-user.

The task force will reference existing standards related to static charge and use established measurement methods as much as possible. The guideline will demonstrate the validity of using the measurement methods to comply with the recommended levels. The proposed guideline will be used primarily by equipment manufacturers during tool design so that static control methods can be incorporated in the equipment to reduce ESD to acceptable levels. The end-user will be able to use the recommended test methods to verify compliance with an equipment purchase specification.

Conclusion

The SEMI Equipment Static Charge Task Force is working on an exit-charge guideline for production equipment. This guideline will recommend maximum acceptable levels of static charge to avoid problems of equipment malfunctions, particle contamination, and ESD damage. This guideline is needed to ensure that equipment and processes are not adversely affected by the levels of static charge created during semiconductor manufacturing. It will also help to ensure that static charge generated in one piece of equipment will not become a problem for the next piece of equipment or result in product yield losses. The task force's goal is to draft a document and submit it for review and voting by this October.

Acknowledgments

Information contained in this article was presented at the EOS/ESD Symposium in Orlando, FL, September 1996 and appeared in the proceedings of the symposium. The authors would like to thank the ESD Association for granting permission to reprint that information.

References

1. Steinman A, "Best Practices for Applying Air Ionization," in ESD Symposium Proceedings, Rome, NY, ESD Association, pp 245—252, 1995.

2. Jillie DW, "Electromagnetic Compatibility in the Semiconductor Factory," Semiconductor International, 16(8):120—128, 1993.

3. Welker RW, "Equivalence between Surface Contamination Rates and Class 100 Conditions," in Proceedings of the 34th Annual Technical Meeting of the Institute of Environmental Sciences, Mount Prospect, IL, Institute of Environmental Sciences (IES), pp 449—454, 1988.

4. Inoue W, Sakata S, Chirifu T, et al., "Aerosol Deposition on a Wafer," in Proceedings of the 34th Annual Technical Meeting of the Institute of Environmental Sciences, Mount Prospect, IL, IES, pp 423—428, 1988.

5. Jillie DW, "Controlling Electromagnetic Interference in Semiconductor Facilities," Microcontamination, 11(7):47—51, 1993.

6. Specification for Semiconductor Manufacturing Facility Electromagnetic Compatibility—SEMI Standard E33-94, Mountain View, CA, SEMI, 1994.

7. Human Body Model—Component Level—EOS/ESD S5.1-1993, Rome, NY, ESD Association.

8. Charged Device Model Component Testing — Draft Standard EOS/ESD DS5.3-1993, Rome, NY, ESD Association.

9. Rashid M, and Russell W, "IEC 801: The Transient Immunity Standard Defined," in Interference Technology Engineer's Master, West Conshohocken, PA, Robar Industries, 1995.

10. Recommended Practice for Measuring Static Charge on Objects and Surfaces—SEMI Standard E43-95, Mountain View, CA, SEMI, 1995.

11. Cooper DW, Miller RJ, Wu JJ, et al., "Deposition of Submicron Aerosol Particles during Integrated Circuit Manufacturing: Theory," in Proceedings of the Ninth International Symposium on Contamination Control, Los Angeles, International Confederation of Contamination Control Societies (ICCCS), pp 19—26, 1988.

12. Wu JJ, Miller RJ, Cooper DW, et al., "Deposition of Submicron Aerosol Particles During Integrated Circuit Manufacturing: Experiments," in Proceedings of the Ninth International Symposium on Contamination Control, Los Angeles, ICCCS, pp 27—32, 1988.

13. Dash G, and Straus I, "Testing for ESD Immunity," Compliance Engineering Reference Guide, 1995.

Arnold Steinman is chief technology officer for Ion Systems (Berkeley, CA), where he has been responsible for the design of the company's ionization static control products since 1983. He holds four patents covering air ionizer technology. Past work experience includes stints on the staffs of the Lawrence Livermore and Lawrence Berkeley laboratories as well as serving as an independent consultant on such projects as cordless transmitters for musical instruments and microprocessor-based systems for temperature control of large buildings. Steinman graduated from the Polytechnic Institute of Brooklyn, receiving a BSEE (1965) and an MSEE (1966). He is a member of the ESD Association and served as chairman of its ionization standards committee. He is also a member of the SEMI Metrics Committee and leader of the SEMI Equipment Static Charge Task Force, a senior member of the Institute of Environmental Sciences, and a member of the Electrostatic Society of America and the American Association for Aerosol Research. (Steinman can be reached at 510/548-3640.)

Julian A. Montoya is Intel's corporate program manager for electromagnetic compatibility and infrared thermography, based in Hillsboro, OR. An Intel employee since 1991, he is responsible for managing the electromagnetic environment and electromagnetic effects within the company's manufacturing and assembly/test environments worldwide. Montoya is also responsible for implementing infrared thermography as a preventive maintenance tool across all manufacturing and assembly/test facilities. Montoya received a BSEE (1991) from the University of New Mexico with an emphasis on semiconductor manufacturing. Montoya is a member of the IEEE EMC Society, the IEEE Engineering Management Society, and the ESD Association. He is also involved with SEMI in formulating standards as they apply to electromagnetic and electrostatic compatibility. Montoya has written articles for IEEE publications and is in the process of coauthoring an IEEE color book series on cleanroom practices. (Montoya can be reached at 503/613-9268.)

MicroHome | Search | Current Issue | MicroArchives
Buyers Guide | Media Kit