Evaluating chemical mechanical cleaning technology for post-CMP applications

John M. de Larios, Jackie Zhang, Eugene Zhao, Tom Gockel, and Michael Ravkin, OnTrak Systems

Chemical mechanical planarization (CMP) has rapidly become a key technology in the production of logic and memory devices. Compared to etch, implant, and other more traditional semiconductor manufacturing processes, CMP is still in its early stages of development; however, as a technology it has made significant steps forward.¹ New polishing techniques are appearing as well as new polishing consumables that focus primarily on improvements in polishing uniformity, removal rate, and planarization.² Regardless of the choice of equipment, however, CMP produces an extremely high level of surface contamination, so cleaning has become an integral part of a manufacturable planarization process.

For many high-volume production fabs, the cleaning process of choice is mechanical double-sided brush scrubbing, referred to as DSS. While the scrubbing process is well documented, advances in CMP technology and tighter defect specifications place an ever-increasing burden on the cleaning step.³ The capabilities of any post-CMP clean must evolve to stay effective. An example of this evolution is the addition of more effective cleaning chemicals and improved mechanical action on the double-sided scrubber. To properly differentiate between the standard DSS process and recent enhancements in cleaning capabilities, the new technology has been named chemical mechanical cleaning (CMC).

CMC technology allows hydrofluoric acid processing (CMC/HF) of the wafer during the scrubbing process instead of using an HF bath before or after a standard scrub. This approach combines the chemical action of the HF with the mechanical action of the scrub without the throughput loss associated with using two separate cleaning processes. The HF aids in undercutting slurry particles that are chemically bonded to the oxide surface, making them easier to remove by the mechanical action of the scrubber, which in turn leads to lower overall defect levels. Finally, the HF removes trace surface metals as well as mobile ions and damaged hydrated oxide in the subsurface region of the polished oxide film. The CMC/HF process targets between 30 and 100 Å of oxide removal.

During planarization, the wafer surface is subjected to high local mechanical pressures and exposure to either highly acidic or caustic solutions. The resulting modification and damage of the surface and near-surface region of the dielectric layer are inherent in CMP.⁴ While the subsurface damage can adversely affect device properties, a greater concern is the substantial and unavoidable amounts of surface contamination.⁵ This CMP-related contamination mainly consists of particles and trace metals.⁶ In an effort to reduce particulate levels generated by the primary polishing step, many CMP technologies use multiple polishing steps. For example, the first polish/planarization step on a hard pad is often followed with a DI-water buff on a soft pad. Although the buffing step, which is actually a mechanical cleaning step, produces a substantially cleaner surface, it adds complexity to the polishing hardware and reduces wafer throughput.⁷ Many facilities are therefore moving toward single-step polishing in an effort to mitigate the disadvantages of a multistep process. Using a one-step polish requires an advanced post-CMP cleaning technique and therefore a more-thorough understanding of CMP particle contamination. This article reports on a study of post-CMP contamination and then discusses an improved process of contamination removal involving CMC.

CMP Defect Classification

CMP-related particles are typically measured on the front side of a wafer using laser-scattering instruments. While this well-established technology offers reproducible and meaningful particle information, it has significant limitations. The main limitation of laser-scattering tools is that they cannot detect all particles based on their size, morphology, or location. For example, particles located in the edge-exclusion area or on the bevel edge of the wafer cannot be identified. This type of contamination can have a deleterious impact on die yield since it can transfer to the front of the wafer during downstream processing. Another class of defects located on the front of a wafer cannot be detected using particle counters because of size or morphology considerations. This type of contamination is easily visible with dark-field microscopy, scanning electron microscopy (SEM), or atomic force microscopy (AFM), but it is difficult to quantify. For the purpose of this study, post—oxide CMP defects are broken into the classes listed in Table I. The metrology techniques suitable for identification of each defect classification and typical defect densities per wafer are also presented in the table.

Class	Type	Typical Size	Metrology Technique	Preclean Defects/Wafer
A	Scratch	Few µm x several mm	Laser scattering	<5
B	Area defect	0.5 µm x several µm	Laser scattering	20­500
C	Large particle	0.2 µm	Laser scattering	>105
D	Small particle	<=0.2 µm	SEM, dark field, AFM	104­109
E	Edge particle	0.2 µm	SEM	105­109

Table I: Classification of CMP defects.

Oxide CMP defects such as scratches are classified as Class A defects. These defects are a direct result of a failure of the polish and are caused by one of several problems. Any large and hard substance, such as a chunk of dried slurry, falling on the polishing pad can lead to the semicircular scratch shown in Figure 1. These defects are typically several microns wide and many millimeters long. Since Class A defects cannot be removed by any cleaning technique, they must be minimized or eliminated by proper control of polishing, environment, and pad-conditioning techniques.

Figure 1: True scratches on polished wafers have characteristic shapes. Shown is a typical semicircular-shaped scratch classified as a Class A defect.

Class B defects are seldom found in great numbers. On a laser-scattering particle counter, they can appear as short area defects and may be misinterpreted as small scratches. However, under SEM or dark-field microscopy, as depicted in Figure 2, many of these defects are clearly identified as slurry that appears to be smeared across the wafer surface. This type of defect can be several microns wide and tens of microns long. The density of these defects is variable but seldom very large. The slurry that forms a Class B defect is strongly bonded to the wafer surface.

Figure 2: Large-area Class B defects can be caused by agglomerated slurry particles strongly bonded to the wafer surface.

Class C defects are ubiquitous to CMP. These defects are slurry particles loosely attached to the wafer surface. They are common to all polishing processes but are much reduced if a DI-water buff is included. These particles come in a range of sizes since they are caused by agglomeration of slurry particles. Class C defects, such as those shown in Figure 3, are formed from piles of individual slurry particles. SEM analysis has shown that these agglomerates are typically around 0.2 µm across and 0.1 to >0.2 µm high. There can be >10⁵ of these particles on the wafer surface before cleaning, but they are easily
removed by standard DSS techniques. The use of DSS and ammonium hydroxide (NH_⁴OH) can aid oxide CMP cleaning and is normally required for tungsten CMP cleaning.

Figure 3: Class C defects are caused by normal slurry agglomeration that is weakly bonded to the wafer surface.

Class D defects are listed in Table I as being <0.2 µm. Although AFM analysis indicates such defects may reach 0.5 µm in diameter, they are difficult to detect using laser scattering because they are normally <600 Å high. The density of these defects varies greatly, ranging from 10³ to 10⁹ defects/wafer. The lower densities are often found for DI-water buff processes, while the higher concentrations are seen following a one-step CMP process. The use of a water rinse on the hard pad can significantly increase the density of Class D defects if the rinse is not implemented correctly.⁸ This kind of defect differs greatly from the Class C variety: Class D defects are much smaller, can have an extremely high density with >10⁹ per wafer, and can be difficult to remove. AFM and SEM analyses indicate that these defects are composed of a small number of individual slurry particles bound together, as illustrated in Figure 4. These slurry particles are seldom more than one layer thick, which accounts for their lack of height. Class D defects are the least understood and, because of their small size, their impact on device yield is not clear; however these strongly bonded defects are readily removed using CMC/HF.

Figure 4: Before cleaning, Class D defects are identified using AFM. The density of these clusters of slurry particles is dependent on the polish rinse process.

The Class E defects cannot be observed using standard light-scattering techniques because they are located in the edge-exclusion region of the wafer on or near the bevel edge. These defects are similar to Class C defects when viewed by SEM, yet they are not easily removed using standard cleaning techniques. Their presence or absence is strongly dependent on the polishing equipment and process. This type of contaminant can become dislodged during subsequent processing and then transfer to the front of the wafer where it can adversely affect device yield. Figure 5 depicts such defects before and after a CMC bevel-edge cleaning. The cleaning of Class E defects requires special modification of the scrubber to establish mechanical scrubbing action at the wafer's edge.

Figure 5: An SEM comparison shows CMC Class E defects on a wafer before (top) and after CMC cleaning.

Post-CMP Cleaning Process

Mechanical brush scrubbing, as exemplified by DSS, dominates the post-CMP cleaning market because it has been proven effective for both oxide and metal processes. This technology has evolved from a DI water—only process to one that includes chemicals such as NH^₄OH. The particle removal benefits of NH^₄OH are well documented.⁹ At the high pH of the ammonium hydroxide process, the zeta potentials of the substrate, slurry, and polyvinyl alcohol (PVA) brush are all negative. This provides an electrostatic repulsion between the slurry particles and the wafer surface. Brush loading is also significantly reduced by controlling the zeta potential. The DI-water/NH^₄OH scrub is limited by the inability of the process to reduce metals. In fact, at the high-pH regime, metals tend to plate on the surface. In order to meet the cleaning requirements for trace-metal removal, chemicals that could remove metals from the polished oxide surfaces were needed. This requirement led to the development of next-generation, HF-compatible CMC cleaning systems with enhanced mechanical capabilities.

Enhanced Cleaning Using CMC

The cleaning capabilities of DSS are significantly enhanced by operating in the CMC process regime. The improvements include operating at higher cleaning pressures, the use of HF during the mechanical cleaning step, and special hardware for bevel-edge cleaning. Table II compares the cleaning capabilities of DSS and CMC. As mentioned in the discussion on defect types, Class A scratch defects cannot be removed since they are gross defects in the dielectric film surface that can only be reduced by improving the first polish step or by the proper use of a second-step polish on a soft polishing pad.

Class	Type	Before (SRD)	DSS/NH4OH	CMC/HF
A	Scratch	<5	<5	<5
B	Area defect	20-500	10-50	0-10
C	Large particle	>105	<150	<50
D	Small particle	104-109	104-108	<103
E	Bevel edge	105-109	105-109	102-104

Table II: Comparison of DSS and CMC post-CMP cleaning technologies (defects per wafer).

Class B defects are difficult to remove using DSS/NH^₄OH but are readily removed using CMC/HF processing. With this type of defect, the slurry has chemically bonded with the surface of the dielectric film and requires HF to provide an undercutting action to aid the mechanical action of the CMC system. HF can also reduce the absolute particle count of Class C defects for a single-step oxide polish. As Table III shows, tetraorthoethylsilicate (TEOS) and fluorinated silica glass (FSG) planarized with a proprietary linear planarization technology (LPT) have a significantly lower particle count when cleaned using CMC/HF compared to DSS/NH^₄OH.¹⁰ The total reflection x-ray fluorescence (TXRF) analysis summarized in Table IV indicates that the CMC/HF clean produces significantly lower trace metals levels than the DSS/NH^₄OH process. For the CMC clean, 0.5% HF was used to remove <50 Å of oxide. The HF process returns the trace metals to the contamination level found on as-deposited films. These particle and trace-metal results have been reproduced on several different types of polishers and CMP processes.

Wafer (150 mm)	Cleaning Process	Particles (0.2 µm)
TEOS	DSS/NH4OH CMC/NH4OH/HF	126±107 30±12
FSG	DSS/NH4OH CMC/NH4OH/HF	141±108 42±17

Table III: Comparison of DSS and CMC clean following a single-step CMP process.¹

(1000/cm2)	K	Ca	Ti	Cr	Mn	Fe	Ni	Cu	Zn
TEOS:
Control	<20	<8	<5	<3	<1	2	<1	<1	<3
DSS/NH4OH	200	20	<5	<3	<1	10	<1	<1	100
CMC/HF	<20	<8	<5	<3	<1	2	<1	<1	<3
FSG:
Control	<20	<8	<5	<3	<1	<1	<1	<1	<3
DSS/NH4OH	200	20	<5	<3	<1	20	<1	<1	300
CMC/HF	<20	<8	<5	<3	<1	2	<1	<1	<3

Table IV: TXRF comparison of DSS and CMC cleans for TEOS and FSG substrates following a single-step CMP process.

Class D defects are one of the least-studied defect types, probably because they are harder to detect using laser scattering and require extensive, time-consuming inspection. As the industry moves toward smaller device geometries, an understanding of Class D defects will become more important. These agglomerated slurry defects cannot be removed using DSS/NH^₄OH because they are tightly bound to the wafer surface. A CMC/HF process using enhanced mechanical action does reduce defect density by at least six orders of magnitude. Since these particles cannot be reliably counted by a laser-scanning tool, however, it is difficult to obtain quantitative and statistically meaningful results. The results in Table II represent the best possible density calculation using current technology.

A final example of CMC's enhanced capabilities is the cleaning of the bevel edge of the wafer. DSS alone cannot adequately remove slurry residues from the bevel edge because there is a minimal mechanical cleaning action on this surface. Figure 5 shows SEM images of a wafer edge before and after the CMC edge clean, following CMP oxide processing. Without using the edge clean, this contamination can be transferred to the front of a wafer in subsequent process systems, which can cause significant yield loss. During the CMC process, a roller scrubs the critical bevel area and effectively removes the contamination.

Conclusion

CMP processing introduces significant amounts of slurry contamination to all parts of the wafer surface, including the front, back, and bevel edge. The removal of this slurry is critical to the success of a high-yield CMP process. The chemical mechanical cleaning technology described in this article offers the promise of improved post-CMP cleaning. Based on double-sided brush scrubbing, this method uses a combination of HF delivery and additional mechanical action to significantly reduce contamination levels. Polishing defects have been divided into five different classifications based on defect morphology and location. Defects such as scratches cannot be removed by any cleaning method, while slurry-related defects can be removed with CMC cleaning. In addition to particle contamination removal, CMC cleaning reduces trace metallic contaminants on all wafer surfaces to acceptable levels. Development work is in progress to investigate the further benefits of CMC cleaning by applying progressively higher mechanical energy to the wafer surface.

Acknowledgments

The authors want to thank the following OnTrak colleagues for their helpful input: Willy Krusell, Rajul Jairath, Igor Malik, Bill Dyson, Diane Hymes, and especially Pearce Toulson for all of the AFM work. Also, the SEM image used in Figure 3 was supplied by Dale Hetherington of Sandia National Laboratories.

References

1. DeJule R, "Advances in CMP," Semiconductor International, 19(12):88, 1996.

2. Jairath R, Pant A, Mallon T, et al., "Linear Planarization for CMP," Solid State Technology, 39(10): 1996.

3. De Larios JM, Ravkin MA, Hetherington DL, and Doyle JJ, "Post-CMP Cleaning for Oxide and Tungsten Applications," Semiconductor International, 19(5):121—128, 1996.

4. Wallace WE, Wu WL, and Carpio RA, "Chemical Mechanical Polishing of SiO² Thin Films Studied by X-ray Reflectivity," Thin Solid Films, 280:37, 1996.

5. Kaufman FB, invited presentation at the Spring 1995 meeting of the Materials Research Society, San Francisco, CA.

6. Ravkin MA, Hetherington DL, de Larios JM, et al., "A New Chemical Mechanical Scrubbing Process Using HF for
Post-CMP Cleaning Applications," in Proceedings of the First International CMP-MIC, Santa Clara, CA, February 1996.

7. Ali I, Roy SR, Shinn G, et al., "The Effect of Secondary Platen Downforce on Post-Chemical Mechanical Planarization Cleaning," in Proceedings of the Microcontamination Conference, Canon Communications, Santa Monica, CA, pp 196—205, 1994.

8. Ravkin MA, Hetherington DL, Zhang JX, et al., "Defect Evaluation for Primary Pad Oxide Polishing," in Proceedings of the Second International CMP-MIC, Santa Clara, CA, February 1997.

9. Krusell WC, de Larios JM, and Zhang J, "Mechanical Brush Scrubbing for Post-CMP Clean," Solid State Technology, 38(6):109—114, 1995.

10. Malik I, Emami R, Mallon T, et al., "CMP of FSG: Issues in Integration," in Proceedings of the Second International CMP-MIC, Santa Clara, CA, February 1997.

John M. de Larios, PhD, is vice president of cleaning technology and engineering at OnTrak Systems in San Jose, CA, where he is responsible for cleaning engineering, including new product development and reliability. De Larios received his BS from the University of California, Berkeley and MSc from the University of British Columbia, both in metallurgical engineering, and his PhD in materials science and engineering from Stanford University. He has written and coauthored more than 25 technical papers on the cleaning of semiconductor surfaces. (De Larios can be reached at 408/952-5419.)

Jackie Zhang is a product engineer at OnTrak Systems, working on cleaning technology development. Before joining OnTrak in 1993, she worked at the Vacuum Technology Research Institute in Beijing. She received her BS in mechanical engineering from the Northeast University in Liaoning, China, and her MS in mechanical engineering from San Jose State University.

Eugene Zhao, PhD, has been a process development engineer at OnTrak Systems since 1996. His responsibilities include post-CMP defect characterization and post-CMP cleaning process development. He received his BS in chemistry from Fudan University (China) in 1987 and his PhD in physical chemistry from the University of California, Berkeley in 1995. Zhao is the author of more than 10 technical publications in such areas as post-CMP cleaning process development.

Thomas R. Gockel is senior project manager of development engineering at OnTrak Systems, with responsibility for new products in cleaning technology. Before joining the company, he was engineering manager at Rippey, senior design engineer at Silicon Valley Group, and project engineer at Semiconductor Systems.

Michael Ravkin, manager of the cleaning technology group at OnTrak Systems, received his BS in electrical engineering and MS in material science from St. Petersburg Electrotechnical Institute (USSR/Russia) in 1982. Ravkin has published more than 20 technical papers on CMP, cleaning, and defects in silicon.

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