INDUSTRY NEWS
Study finds human factor is key to best fabs' productivity
Here's an axiom for chipmakers: If you want to run a good fab, find good managers to run it. After surveying more than 30 fab sites in the course of a six-year benchmarking study, researchers at the University of California, Berkeley, have concluded that since most fabs around the world use similar tools and processes, human performance factors separate the productive chip factories from their less efficient counterparts.
"The differences aren't technologi-cal, they're managerial," asserts David Hodges, one of two codirectors for the ongoing Competitive Semiconductor Manufacturing (CSM) program. Established in 1991, the program involves faculty and students from UC Berkeley's College of Engineering, Haas School of Business, and the department of economics. The goal of the comparative study is to systematically explain the manufacturing practices used by the world's best fabs.
Hodges, a professor of electrical engineering and computer sciences, says faculty colleagues and graduate students who are participating in the CSM program "benchmark major parameters," including both wafer, or line, yield and die yield, then "normalize that for die area." They also measure "productivity in terms of wafer production and normalize that by the equipment set. For example, if you have 20 steppers we'll [determine] your productivity per stepper."
|

Basic themes for best fab practices
1. Make manufacturing mistake proof
2. Automate information handling
3. Integrate process, equipment and process data, and analyze statistically
4. Develop a problem-solving organization
5. Reduce the division of labor
6. Secure the requisite talent
7. Manage development and introductions of new process technology
8. Schedule manufacturing activity
|
The results of their work have led to the discovery that "people who are good performers on the yield side tend to be good performers on the productivity side," says Hodges. In other words, productive fabs are defined by their ability to produce more usable wafers with better yield for each of those wafers than other fabs.
Program evaluations are based on technology, business practices, and the business environment. The program itself has three main elements:
-
Comparative studies of top fabs to pinpoint "world-class" managerial, organizational, technical, and human resource practices.
- Academic research projects that focus on how to improve semiconductor manufacturing, business, and management practices.
- Publication of the results through research reports, conferences, archival publications, and short courses for engineers and managers.
Thirty-eight research reports have been issued, which have been the basis for master's theses and doctoral dissertations by graduate students participating in the CSM effort. At least 11 students have received doctoral degrees based on their work.
Data are kept anonymous to protect proprietary information of the participating chipmakers, who are given detailed reports on their comparative merits based on quantitative metrics. Participants pay $25,000 and must fill out a 100-page questionnaire.
Poorly performing fabs "tend to fall down in several categories," cycle time being one of them, Hodges points out. He notes that the "convergence" of processes in the past 10 years means that "almost any fab" the Berkeley teams have visited uses the same processes and the same machines. Despite the process and tool uniformity, the teams have observed great variations in productivity from site to site.
"There are no huge differences in process technology," agrees Robert Leachman, the other codirector of the CSM program. Cycle time is just one of three "axes" relevant to fab efficiency. The other two are yield and equipment efficiency, or wafer throughput. Chipmakers usually need to make trade-offs "among each of the three," he says.
"A fab with leadership in all three axes is an extraordinary accomplishment," continues Leachman, a professor of industrial engineering and operations research. He adds that the more efficiently run chip plants "have figured out better ways to beat these trade-offs than other players. Companies who are good tend to be good on all three axes." He adds: "Managements encourage staffs to work hard on two axes and to let the other go."
Leachman cautions it is important to consider the type of chip in production at a particular fab in order to understand how management views each of the three factors. "Traditionally, the memory companies have deemphasized cycle time and emphasized the other two [axes], whereas logic and ASIC companies have emphasized cycle time. During a downturn period like this, the memory guys suddenly are emphasizing cycle time."
Another important practice highlighted in the study, which has focused so far on fabs processing 5- and 6-in. wafers, centers on the use of statistical tools. One of the reports generated by the program notes the need for a "convenient statistical tools used by process engineers to pinpoint sources of die yield losses to make rapid deployment of containment countermeasures." Leachman explains the need for convenience by contrasting two fabs, "both with pretty good integrated data collection. . . with both in-line and end-of-line data coming together . . . with SPC results."
In one fab, engineers download the data to their personal computers "and whatever statistical tools they're using and try to run them there." The other fab has installed a UNIX workstation with proper menus and statistical tools. Using this second setup, a polyetch engineer can easily sort through, say, test data on polyetch runs. "Whereas it's probably possible to find the [statistical] tools on the PCs to do these kinds of things, it takes time to hunt for them. The engineer with the UNIX figures it out the same day. In the other place, it takes a week."
While technology may not vary, personnel practices differ widely in the fabs that have participated in the CSM program thus far, says Hodges. "The interesting thing is that there is no one best way to organize, train, and motivate your workforce. Practices will differ in different companies in different parts of the world." For example, he says, South Korean fabs "are very highly disciplined organizations [where] basically, the lowest level fab operators are robots." These workers are typically young women who burn out and quit after a few years, according to Hodges. In contrast, Japanese chipmakers hire "career employees who are cultivated for their intelligence and learning capacity." The chipmakers in the U.S. and Taiwan "are sort of in the middle" of the Korean and Japanese examples, he says, adding, "some are quite good and some are not so good."
How do employees feel about being put under the Berkeley team's microscope? "There's a gradient of responses," Leachman replies, "as you proceed from top management down to the staff engineer. In top management's view, [the study] is not very expensive information and it's critical to get a sense of where they stand relative to everybody else, [whereas] the staff engineer is in outright fear that 'this is going to make me look bad.' "
Many of the scrutinized fabs, realizing they were "weak in certain areas, rallied the troops" and improved their operations, Leachman says. A primary reason for the trepidation on the cleanroom floor, he points out, is that the outside groups visiting the fabs are usually conducting quality audits. Seeing another clipboard-toting coterie, wary employees are worried "they're going to get hammered." The Berkeley group defuses the tension by emphasizing "we are not a quality audit, no one is going to know who you are in this study." Perhaps the ultimate compliment, according to Leachman, is that a few chipmakers with high marks have used the study as a marketing tool. "Some of the companies have actually advertised that they've come out of the Berkeley study in great shape, and you should do business with us."
Each Berkeley team comprises eight people, half of them graduate students and the other half faculty from economics, business, and engineering disciplines. Participating graduate students benefit, too, says Leachman, who calls the program "equal parts research and education. The staff and the students get an incredible eye-opener."
Eight-inch fabs are next on the agenda, says Hodges. The Berkeley teams have surveyed four 8-in. factories recently with two more on tap. What they've seen so far holds no surprises and should be heartening for the best performers. "What we're seeing is that there's not much difference between 6- and 8-in. fab performance. If a given organization has been good performing in the 6-in. world, they've managed to transfer a lot of that into the new [chip] generation."

MicroHome |
Search | Current Issue | MicroArchives
Buyers Guide | Media Kit
Questions/comments about MICRO Magazine? E-mail us at cheynman@gmail.com.
© 2007 Tom Cheyney
All rights reserved.
|